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-rw-r--r--Master/texmf-dist/doc/latex/avremu/README75
-rw-r--r--Master/texmf-dist/doc/latex/avremu/avremu.pdfbin0 -> 146364 bytes
-rw-r--r--Master/texmf-dist/source/latex/avremu/avremu.tex132
-rw-r--r--Master/texmf-dist/source/latex/avremu/imgs/mandelbrot-128x128.pngbin0 -> 2810 bytes
-rw-r--r--Master/texmf-dist/source/latex/avremu/imgs/mandelbrot-20x20.pngbin0 -> 2777 bytes
-rw-r--r--Master/texmf-dist/source/latex/avremu/imgs/mandelbrot-250x250.pngbin0 -> 8794 bytes
-rw-r--r--Master/texmf-dist/source/latex/avremu/simple-testsuite.tex511
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/FOOTER1
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/HEADER10
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/complex-memory.c22
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/empty-main.c10
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/fibonacci-rec.c20
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/float.c41
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/func-ptr.c22
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/mandelbrot.c116
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/mul.c52
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/printf.c69
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/shift.c26
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/string.c22
-rw-r--r--Master/texmf-dist/source/latex/avremu/test-suite/sum-rec.c23
-rwxr-xr-xMaster/texmf-dist/source/latex/avremu/test-suite/test-suite223
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.binary.tex94
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.bitops.tex300
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.draw.tex145
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.instr.tex1411
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.io.tex122
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.memory.tex343
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.numbers.tex661
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avr.testsuite.tex56
-rw-r--r--Master/texmf-dist/tex/latex/avremu/avremu.sty54
-rwxr-xr-xMaster/tlpkg/bin/tlpkg-ctan-check2
-rw-r--r--Master/tlpkg/tlpsrc/avremu.tlpsrc0
-rw-r--r--Master/tlpkg/tlpsrc/collection-latexextra.tlpsrc1
33 files changed, 4563 insertions, 1 deletions
diff --git a/Master/texmf-dist/doc/latex/avremu/README b/Master/texmf-dist/doc/latex/avremu/README
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+avremu: An AVR Emulator written in pure LaTeX
+======================================================
+
+LaTeX is known as a typesetting system. But the underlying TeX system
+is a powerful macro processor. In fact, TeX is a Turing-complete
+programming language. TeX can compute anything, that is
+computable. Computeability is a concept from theoretical computer
+science. After visiting a theoretical CS course, you will know that
+there are things that cannot be solved by a machine. Never. Look out
+for the halting problem. So, Turing-complete does not say "It's a
+proper programming language", but more "someone can write a proper
+interpreter for any programming language in it, theoretically".
+
+So back to TeX. To be honest, TeX is a horrible language to code
+in. After writing my master thesis in LaTex, after crafting every
+graphic within with TiKz[1] and pgfplots[2], and after writing my
+first LaTeX package[3], I can honestly say: TeX is the Quasimodo of
+all widely used programming languages. If you can avoid it, avoid it.
+But if you are forced to use it, you can abstract from TeX, since it
+is a "proper" programming language.
+
+Let's say we want to program our document in C on Top of Tex. Then
+there would be the need to interpret the C semantic. Basically we
+would have to write a compiler for C in TeX. Not a very promising
+future, if you start this. But, we can use a normal C compiler to
+compile the C code to some simple platform. Like AVR[4]. Since I have
+other things to do than writing an AVR Emulator in TeX, here it is!
+
+The newest source can be found at https://gitlab.brokenpipe.de/stettberger/avremu
+
+The package is licensed under LPPL 1.3
+
+You are writing an CPU emulator in TeX, the TYPESETTING system?
+---------------------------------------------------------------
+
+Yep.
+
+What Microcontroller is emulated?
+---------------------------------
+
+I aimed for an ATmega8. The AVR platform is an 8 Bit Processor with 16
+Bit memory addresses. The hardware version is shipped with 1 KByte of
+RAM and 8 Kbyte Flash memory, but of course, the emulated processor
+can handle more memory.
+
+Are you insane?
+---------------
+
+Not that anybody knows of.
+
+Are all OP codes implemented?
+-----------------------------
+
+Unfortunately not. I'm still missing 5 opcodes (MULS, MULSU, FMUL,
+FMULS, FMULSU), but until now I did not encounter a C file, the
+AVR-GCC emits these opcodes. The fractional multiply opcodes are also
+somewhat arcane.
+
+Is it fast?
+-----------
+
+Ok, you are asking me, whether a CPU simulator written in TeX, that
+simulates an 8-Bit microcontroller is fast? Propably not. On my
+notebook I could achieve 2.5 KHz, so this is a factor 10000 slower
+than the actual hardware with the highest supported clock rate.
+
+-----
+
+[1] http://www.ctan.org/pkg/pgf
+
+[2] http://pgfplots.sourceforge.net/
+
+[3] http://www.ctan.org/pkg/dataref
+
+[4] http://en.wikipedia.org/wiki/Atmel_AVR
diff --git a/Master/texmf-dist/doc/latex/avremu/avremu.pdf b/Master/texmf-dist/doc/latex/avremu/avremu.pdf
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diff --git a/Master/texmf-dist/source/latex/avremu/avremu.tex b/Master/texmf-dist/source/latex/avremu/avremu.tex
new file mode 100644
index 00000000000..3fe7b693e80
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+++ b/Master/texmf-dist/source/latex/avremu/avremu.tex
@@ -0,0 +1,132 @@
+\documentclass{article}
+\usepackage{avremu}
+\usepackage{listings}
+\usepackage{hyperref}
+\usepackage{filecontents}
+\usepackage{tcolorbox}
+\usepackage{ydoc}
+
+\def\fileversion{v0.1}
+\def\filedate{2014/10/09}
+
+\makeatletter
+\def\cmd#1{\cs{\expandafter\cmd@to@cs\string#1}}
+\def\cmd@to@cs#1#2{\char\number`#2\relax}
+\DeclareRobustCommand\cs[1]{\texttt{\char`\\#1}}
+\makeatother
+
+\begin{filecontents*}{hello-world.c}
+#include <avr/io.h>
+
+int
+main(void)
+{
+ char *str = "Hello World!";
+ char *p = str;
+ while (*p) {
+ UDR = *p++;
+ }
+ asm volatile ("break;");
+}
+\end{filecontents*}
+
+\title{The \texttt{avremu} Package}
+\author{Christian Dietrich\\
+\url{stettberger@dokucode.de}\\
+\url{https://gitlab.brokenpipe.de/stettberger/avremu}}
+
+\begin{document}
+
+\maketitle
+
+\begin{tcolorbox}
+ \lstinputlisting[language=C]{hello-world.c}
+ \tcblower
+ \begin{lstlisting}[language=TeX]
+\avrloadc{hello-world.c}
+\avrrun
+UDR='\avrUDR' in \avrinstrcount\ instructions
+\end{lstlisting}
+\end{tcolorbox}
+\begin{tcolorbox}
+\avrloadc{hello-world.c}\avrrun
+UDR='\avrUDR' in \avrinstrcount\ instructions
+\end{tcolorbox}
+
+
+\LaTeX\ is known as a typesetting system. But the underlying \TeX\ system is a powerful macro
+processor. In fact, TeX is a Turing-complete programming language. \TeX\ can compute anything that
+is computable. Computeability is a concept from theoretical computer science. After visiting a
+theoretical computer-science course, you will know that there are things that cannot be solved by a
+machine. Never. Look out for the halting problem.
+
+This package does contain an \emph{CPU emulator} for the 8-bit microcontroller platform Atmel AVR, more
+precisely it implements the instruction-set architecture of the \texttt{ATmega8}.
+
+\begin{tcolorbox}
+\begin{lstlisting}[language=TeX]
+\avrloadc{mandelbrot.c}
+\avrrun
+
+\avrdrawppm{mandelbrot.ppm}
+\immediate\write18{convert mandelbrot.ppm mandelbrot.png}
+
+\includegraphics[width=\linewidth]{mandelbrot.png}
+\end{lstlisting}
+ \tcblower
+ This picture (250x250) took 44 hours to render. The source code can be found in the test-suite
+ directory under mandelbrot.c.\\
+
+ \includegraphics[width=\linewidth]{imgs/mandelbrot-250x250}
+\end{tcolorbox}
+
+\section{Provided Commands}
+
+\DescribeMacro{\avrloadihex}{\meta{filename}}
+Load an Intel HEX formatted image of the flash into the code memory of the AVR
+emulator. Additionally the state of the AVR emulator is set back to zero.
+
+\DescribeMacro{\avrloadc}[\meta{compiler options}]{\meta{filename}}
+Requires \verb|--shell-escape|. Compiles C source code file with \verb|avr-gcc| and the given
+compiler options. The default compiler option set is \verb|-mmcu=atmega8 -Os|. The resulting
+\texttt{.elf} file is transformed to an Intel HEX file and loaded into the code memory of the
+emulator.
+
+\DescribeMacro{\avrrun}
+Run the emulator until a \textbf{break} instruction occurs.
+
+\DescribeMacro{\avrstep}[\meta{steps}=1]
+Run the emulator for N instructions. The default is a single step. The stepping does automatically
+end, if a \textbf{break} instruction is executed.
+
+\DescribeMacro{\avrinstrcount}
+Expands to the number of executed instructions.
+
+\DescribeMacro{\avrsinglestep}
+Starts an interactive single-stepping mode, which was mainly used for implementing the emulator.
+
+\DescribeMacro{\usravremulibrary}{\meta{list of libraryies}}
+
+\subsection{Access to the Serial Console}
+If the program write to the \verb|UDR| IO register, the emulator catched those characters in an
+internal buffer.
+
+\DescribeMacro{\avrUDR}
+Expands to the internal UDR buffer.
+
+\DescribeMacro{\avrUDRclear}
+Clears the internal UDR buffer.
+
+\subsection{Draw Library}
+\DescribeMacro{\useavremulibrary}{avr.draw}
+
+See source/test-suite/mandelbrot.c for more details.
+
+\section{Implementation Details}
+Read the source.
+\end{document}
+
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: t
+%%% End:
diff --git a/Master/texmf-dist/source/latex/avremu/imgs/mandelbrot-128x128.png b/Master/texmf-dist/source/latex/avremu/imgs/mandelbrot-128x128.png
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diff --git a/Master/texmf-dist/source/latex/avremu/simple-testsuite.tex b/Master/texmf-dist/source/latex/avremu/simple-testsuite.tex
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@@ -0,0 +1,511 @@
+\documentclass{article}
+\usepackage[debug]{avremu}
+
+\begin{document}
+\makeatletter
+% Hook Macro for the tests
+\def\avr@test{}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\def\avr@test@ADD{%
+ \def\avr@test@helper##1##2{%
+ \avr@test@setup{ADD: ##1+##2}%
+ \avr@instr@LDI{0}{\csuse{avr@r31}}{##1}%
+ \avr@instr@LDI{1}{\csuse{avr@r17}}{##2}%
+ \avr@instr@ADD{2}{\csuse{avr@r17}}{\csuse{avr@r31}}%
+ \avr@instr@stepn{3}%
+ }%
+ \avr@test@helper{00000000}{00000001}%
+ \avr@test@SREG{00000000}%
+ \avr@test@REG{r17}{00000001}%
+ % Test Zero Flag
+ \avr@test@helper{00000000}{00000000}%
+ \avr@test@SREG{00000010}%
+ \avr@test@REG{r17}{00000000}%
+ % Test Carry and Half Carry
+ \avr@test@helper{11111111}{00000010}%
+ \avr@test@SREG{00100001}%
+ \avr@test@REG{r17}{00000001}%
+ % Test V
+ \avr@test@helper{10000000}{10000000}%
+ \avr@test@REG{r17}{00000000}%
+ \avr@test@SREG{00011011}%
+}
+\appto\avr@test{\avr@test@ADD}
+
+\def\avr@test@ADC{%
+ \def\avr@test@helper##1##2##3##4{%
+ \avr@test@setup{ADD: (##1:##2) + (##3:##4)}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{##1}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{##2}%
+ \avr@instr@LDI{2}{\csuse{avr@r17}}{##3}%
+ \avr@instr@LDI{3}{\csuse{avr@r18}}{##4}%
+ \avr@instr@ADD{4}{\csuse{avr@r18}}{\csuse{avr@r31}}%
+ \avr@instr@ADC{5}{\csuse{avr@r17}}{\csuse{avr@r30}}%
+ \avr@instr@stepn{6}%
+ }%
+ \avr@test@helper{00000000}{10000001}{00000000}{10000000}%
+ \avr@test@REG{r17}{00000001}%
+ \avr@test@SREG{00000000}%
+
+ \avr@test@helper{00000011}{10000001}{00001100}{10000000}%
+ \avr@test@REG{r17}{00010000}%
+ \avr@test@SREG{00100000}%
+
+}
+\appto\avr@test{\avr@test@ADC}
+
+\def\avr@test@SUB{%
+ \def\avr@test@helper##1##2{%
+ \avr@test@setup{SUB: ##1 - ##2}%
+ \avr@instr@LDI{0}{\csuse{avr@r17}}{##1}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{##2}%
+ \avr@instr@SUB{2}{\csuse{avr@r17}}{\csuse{avr@r31}}%
+ \avr@instr@stepn{3}%
+ }%
+ \avr@test@helper{00001111}{00000010}%
+ \avr@test@REG{r17}{00001101}%
+ \avr@test@SREG{00000000}%
+
+ \avr@test@helper{00001111}{00010000}%
+ \avr@test@REG{r17}{11111111}%
+ \avr@test@SREG{00010101}%
+}
+\appto\avr@test{\avr@test@SUB}
+
+\def\avr@test@SBC{%
+ \def\avr@test@helper##1##2##3##4{%
+ \avr@test@setup{SBC: (##1:##2) - (##3:##4)}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{##3}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{##4}%
+ \avr@instr@LDI{2}{\csuse{avr@r17}}{##1}%
+ \avr@instr@LDI{3}{\csuse{avr@r18}}{##2}%
+ \avr@instr@SUB{4}{\csuse{avr@r18}}{\csuse{avr@r31}}%
+ \avr@instr@SBC{5}{\csuse{avr@r17}}{\csuse{avr@r30}}%
+ \avr@instr@stepn{6}%
+ }%
+ \avr@test@helper{00000000}{10000001}{00000000}{10000001}%
+ \avr@test@REG{r17}{00000000}%
+ \avr@test@REG{r18}{00000000}%
+ \avr@test@SREG{00000010}%
+
+ \avr@test@helper{00000000}{00000000}{00000000}{00000001}%
+ \avr@test@REG{r17}{11111111}%
+ \avr@test@REG{r18}{11111111}%
+ \avr@test@SREG{00110101}%
+
+ \avr@test@helper{00000000}{10000000}{00000000}{00000001}%
+ \avr@test@REG{r17}{00000000}%
+ \avr@test@REG{r18}{01111111}%
+ \avr@test@SREG{00000010}%
+}
+\appto\avr@test{\avr@test@SBC}
+
+\def\avr@test@BRB{%
+ \def\avr@test@helper##1##2##3{%
+ \avr@test@setup{BRB: ##1+##2 => PC+2}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{##1}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{##2}%
+ \avr@instr@ADD{2}{\csuse{avr@r30}}{\csuse{avr@r31}}%
+ \@@BRB{3}{##3}{1}%
+ \avr@instr@LDI{4}{\csuse{avr@r31}}{11001100}%
+ \avr@instr@LDI{5}{\csuse{avr@r20}}{00000000}%
+ \avr@instr@stepn{5}%
+ }%
+ % Check for cleared flag
+ \def\@@BRB{\avr@instr@BRBC}
+
+ \avr@test@helper{10000000}{10000000}{000}%
+ \avr@test@REG{r31}{11001100}%
+
+ \avr@test@helper{10000000}{00000001}{000}%
+ \avr@test@REG{r31}{00000001}%
+
+ % Check for SET flag
+ \def\@@BRB{\avr@instr@BRBS}
+
+ \avr@test@helper{10000000}{10000000}{000}%
+ \avr@test@REG{r31}{10000000}%
+
+ \avr@test@helper{10000000}{10000001}{100}%
+ \avr@test@REG{r31}{10000001}%
+}
+\preto\avr@test{\avr@test@BRB}
+
+\def\avr@test@fibonacci{%
+ \avr@test@setup{Fibonacci -- fib(8)=21}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{00000001}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{00000001}%
+ \avr@instr@LDI{2}{\csuse{avr@r20}}{00000101}%
+ \avr@instr@LDI{3}{\csuse{avr@r21}}{00000001}%
+ % tmp = x
+ \avr@instr@MOV{4}{\csuse{avr@r29}}{\csuse{avr@r30}}%
+ % x = x + y
+ \avr@instr@ADD{5}{\csuse{avr@r30}}{\csuse{avr@r31}}%
+ % y = tmp
+ \avr@instr@MOV{6}{\csuse{avr@r31}}{\csuse{avr@r29}}%
+ % i--
+ \avr@instr@SUB{7}{\csuse{avr@r20}}{\csuse{avr@r21}}%
+ \avr@instr@BRPL{8}{-5}
+ \avr@instr@BREAK{9}
+
+ \avr@instr@stepn{100}%
+ \avr@test@REG{r30}{00010101}
+}
+\preto\avr@test{\avr@test@fibonacci}
+
+\def\avr@test@BITOPS{%
+ \avr@test@setup{Bit Operations}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{00111100}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{00001111}%
+ \avr@instr@AND{2}{\csuse{avr@r30}}{\csuse{avr@r31}}%
+
+ \avr@instr@stepn{3}%
+ \avr@test@REG{r30}{00001100}
+
+ \avr@instr@ANDI{3}{\csuse{avr@r30}}{00001000}%
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r30}{00001000}
+
+ \avr@instr@ORI{4}{\csuse{avr@r20}}{10101010}%
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r20}{10101010}
+
+ \avr@instr@EOR{5}{\csuse{avr@r30}}{\csuse{avr@r20}}%
+ \avr@instr@TST{6}{\csuse{avr@r30}}%
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r30}{10100010}
+}
+\preto\avr@test{\avr@test@BITOPS}
+
+\def\avr@test@SUBI{%
+ \avr@test@setup{SUBI}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{00001111}%
+ \avr@instr@SUBI{1}{\csuse{avr@r30}}{00010000}%
+ \avr@instr@SBCI{2}{\csuse{avr@r30}}{00000001}%
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r30}{11111111}
+ \avr@test@SREG{00010101}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r30}{11111101}
+ \avr@test@SREG{00010100}
+}
+\preto\avr@test{\avr@test@SUBI}
+
+\def\avr@test@CPI{%
+ \avr@test@setup{CPI}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{00001111}%
+ \avr@instr@CPI{1}{\csuse{avr@r30}}{00001111}%
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r30}{00001111}
+ \avr@test@SREG{00000010}
+}
+\preto\avr@test{\avr@test@CPI}
+
+\def\avr@test@MOVW{%
+ \avr@test@setup{MOVW}%
+ \avr@instr@LDI{0}{\csuse{avr@r30}}{00001111}%
+ \avr@instr@LDI{1}{\csuse{avr@r31}}{11110000}%
+ \avr@instr@MOVW{2}{\csuse{avr@r2}}{\csuse{avr@r30}}%
+
+ \avr@instr@stepn{3}%
+ \avr@test@REG{r2}{00001111}
+ \avr@test@REG{r3}{11110000}
+ \avr@test@SREG{00000000}
+}
+\preto\avr@test{\avr@test@MOVW}
+
+\def\avr@test@BSET{%
+ \avr@test@setup{BSET}%
+ \avr@instr@SEI{0}%
+ \avr@instr@SEC{1}%
+ \avr@instr@CLI{2}%
+
+ \avr@instr@stepn{2}%
+ \avr@test@SREG{10000001}
+ \avr@instr@stepn{1}%
+ \avr@test@SREG{00000001}
+
+}
+\preto\avr@test{\avr@test@BSET}
+
+\def\avr@test@BST{%
+ \avr@test@setup{BST}%
+ \avr@instr@LDI{0}{\csuse{avr@r31}}{00010000}%
+ \avr@instr@BST{1}{\csuse{avr@r31}}{100}%
+ \avr@instr@BLD{2}{\csuse{avr@r31}}{000}%
+ \avr@instr@CLT{3}
+ \avr@instr@BLD{4}{\csuse{avr@r31}}{100}%
+
+ \avr@instr@stepn{2}%
+ \avr@test@SREG{01000000}
+
+ \avr@instr@stepn{1}
+ \avr@test@REG{r31}{00010001}
+
+ \avr@instr@stepn{2}%
+ \avr@test@SREG{00000000}
+ \avr@test@REG{r31}{00000001}
+}
+\preto\avr@test{\avr@test@BST}
+
+\def\avr@test@NEG{%
+ \avr@test@setup{NEG}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00000001}%
+ \avr@instr@NEG{1}{\csuse{avr@r20}}%
+ \avr@instr@NEG{2}{\csuse{avr@r20}}%
+
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{11111111}
+ \avr@test@SREG{00110101}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r20}{00000001}
+ \avr@test@SREG{00100001}
+}
+\preto\avr@test{\avr@test@NEG}
+
+\def\avr@test@COM{%
+ \avr@test@setup{COM}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00000001}%
+ \avr@instr@COM{1}{\csuse{avr@r20}}%
+ \avr@instr@COM{2}{\csuse{avr@r20}}%
+
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{11111110}
+ \avr@test@SREG{00010101}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r20}{00000001}
+ \avr@test@SREG{00000001}
+}
+\preto\avr@test{\avr@test@COM}
+
+\def\avr@test@SBR{%
+ \avr@test@setup{SBR[CS]}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001000}%
+ \avr@instr@SBRS{1}{\csuse{avr@r20}}{011}%
+ \avr@instr@LDI{2}{\csuse{avr@r20}}{00001111}%
+ \avr@instr@NOP{3}
+
+ \avr@instr@stepn{3}%
+ \avr@test@REG{r20}{00001000}
+
+ \avr@instr@SBRS{4}{\csuse{avr@r20}}{010}%
+ \avr@instr@LDI{5}{\csuse{avr@r20}}{00001111}%
+ \avr@instr@NOP{6}
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{00001111}
+}
+\preto\avr@test{\avr@test@SBR}
+
+\def\avr@test@ASR{%
+ \avr@test@setup{ASR}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001001}%
+ \avr@instr@ASR{1}{\csuse{avr@r20}}%
+ \avr@instr@LDI{2}{\csuse{avr@r20}}{10001001}%
+ \avr@instr@ASR{3}{\csuse{avr@r20}}%
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{00000100}
+ \avr@test@SREG{00011001}
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{11000100}
+ \avr@test@SREG{00010101}
+}
+\preto\avr@test{\avr@test@ASR}
+
+\def\avr@test@LSR{%
+ \avr@test@setup{LSR}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001001}%
+ \avr@instr@LSR{1}{\csuse{avr@r20}}%
+ \avr@instr@LDI{2}{\csuse{avr@r20}}{10001001}%
+ \avr@instr@LSR{3}{\csuse{avr@r20}}%
+
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{00000100}
+ \avr@test@SREG{00011001}
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{01000100}
+ \avr@test@SREG{00011001}
+}
+\preto\avr@test{\avr@test@LSR}
+
+\def\avr@test@ROR{%
+ \avr@test@setup{ROR}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00000001}%
+ \avr@instr@ROR{1}{\csuse{avr@r20}}%
+ \avr@instr@ROR{2}{\csuse{avr@r20}}%
+ \avr@instr@ROR{3}{\csuse{avr@r20}}%
+
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{00000000}
+ \avr@test@SREG{00011011}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r20}{10000000}
+ \avr@test@SREG{00001100}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r20}{01000000}
+ \avr@test@SREG{00000000}
+}
+\preto\avr@test{\avr@test@ROR}
+
+
+\def\avr@test@LDX{%
+ \avr@test@setup{LDX}%
+ \avr@mem@set{11110111}{257}%
+ \avr@mem@set{11110000}{258}%
+ \avr@mem@set{11110001}{259}%
+
+ \avr@instr@LDI{0}{\csuse{avr@r27}}{00000001}%
+ \avr@instr@LDI{1}{\csuse{avr@r26}}{00000010}%
+ \avr@instr@LDX{2}{\csuse{avr@r20}}%
+ \avr@instr@LDXp{3}{\csuse{avr@r21}}%
+ \avr@instr@LDmX{4}{\csuse{avr@r22}}%
+ \avr@instr@LDmX{5}{\csuse{avr@r23}}%
+ \avr@instr@LDmX{6}{\csuse{avr@r24}}%
+ \avr@instr@LDmX{7}{\csuse{avr@r24}}%
+
+ \avr@instr@stepn{8}%
+ \avr@test@REG{r20}{11110000}
+ \avr@test@REG{r21}{11110000}
+ \avr@test@REG{r22}{11110000}
+ \avr@test@REG{r23}{11110111}
+ \avr@test@REG{r24}{00000000}
+ \avr@test@REG{r26}{11111111}
+ \avr@test@REG{r27}{00000000}
+}
+\preto\avr@test{\avr@test@LDX}
+
+\def\avr@test@STZ{%
+ \avr@test@setup{STZ}%
+
+ \avr@instr@LDI{0}{\csuse{avr@r31}}{00000001}%
+ \avr@instr@LDI{1}{\csuse{avr@r30}}{00000010}%
+ \avr@instr@STZ{2}{\csuse{avr@r30}}%
+ \avr@instr@STmZ{3}{\csuse{avr@r30}}%
+ \avr@instr@STZp{4}{\csuse{avr@r0}}%
+ \avr@instr@STZp{5}{\csuse{avr@r0}}%
+
+ \avr@instr@stepn{4}%
+ \avr@test@MEM{258}{00000010}
+ \avr@test@MEM{257}{00000010}
+
+ \avr@instr@stepn{2}%
+ \avr@test@MEM{258}{00000000}
+ \avr@test@MEM{257}{00000000}
+}
+\preto\avr@test{\avr@test@STZ}
+
+\def\avr@test@SWAP{%
+ \avr@test@setup{SWAP}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001001}%
+ \avr@instr@SWAP{1}{\csuse{avr@r20}}%
+
+ \avr@instr@stepn{2}%
+ \avr@test@REG{r20}{10010000}
+}
+\preto\avr@test{\avr@test@SWAP}
+
+\def\avr@test@LDSS{%
+ \avr@test@setup{LDS - STS (short)}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001001}%
+ \avr@instr@STSS{1}{\csuse{avr@r20}}{1101001}%
+ \avr@instr@LDSS{2}{\csuse{avr@r21}}{1101001}%
+
+ \avr@instr@stepn{3}%
+ \avr@test@REG{r21}{00001001}
+}
+\preto\avr@test{\avr@test@LDSS}
+
+\def\avr@test@LDS{%
+ \avr@test@setup{LDS - STS (long)}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001001}%
+ \avr@instr@STS{1}{\csuse{avr@r20}}{0000000011111111}%
+ \avr@instr@LDS{3}{\csuse{avr@r21}}{0000000011111111}%
+ \avr@instr@SBRC{5}{\csuse{avr@r0}}{011}% Skip always
+ \avr@instr@LDS{6}{\csuse{avr@r20}}{0000000011110000}%
+ \avr@instr@NOP{8}%
+
+ \avr@instr@stepn{5}%
+ \avr@test@REG{r21}{00001001}
+}
+\preto\avr@test{\avr@test@LDS}
+
+\def\avr@test@CPSE{%
+ \avr@test@setup{CPSE}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{00001001}%
+ \avr@instr@LDI{1}{\csuse{avr@r21}}{00001001}%
+ \avr@instr@CPSE{2}{\csuse{avr@r20}}{\csuse{avr@r21}}% Skip always
+ \avr@instr@LDI{3}{\csuse{avr@r21}}{00001111}%
+ \avr@instr@NOP{4}%
+
+ \avr@instr@stepn{4}%
+ \avr@test@REG{r21}{00001001}
+}
+\preto\avr@test{\avr@test@CPSE}
+
+\def\avr@test@SBIC{%
+ \avr@test@setup{SBIC}%
+ \avr@instr@LDI{0}{\csuse{avr@r20}}{11110000}%
+ \avr@instr@OUT{1}{001111}{\csuse{avr@r20}}%
+ \avr@instr@SBIC{2}{01111}{111}% Skip never
+ \avr@instr@LDI{3}{\csuse{avr@r21}}{00001111}%
+ \avr@instr@NOP{4}%
+
+ \avr@instr@stepn{5}%
+ \avr@test@REG{r21}{00001111}
+}
+\preto\avr@test{\avr@test@SBIC}
+
+\def\avr@test@ADIW{%
+ \avr@test@setup{SBIC}%
+ \avr@instr@LDI{0}{\csuse{avr@r31}}{11111111}%
+ \avr@instr@LDI{1}{\csuse{avr@r30}}{11000000}%
+ \avr@instr@ADIW{2}{11}{111111}%
+ \avr@instr@ADIW{3}{11}{000001}%
+ \avr@instr@SBIW{4}{11}{000010}%
+
+
+
+ \avr@instr@stepn{3}%
+ \avr@test@REG{r30}{11111111}
+ \avr@test@REG{r31}{11111111}
+ \avr@test@SREG{00010100}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r30}{00000000}
+ \avr@test@REG{r31}{00000000}
+ \avr@test@SREG{00000011}
+
+ \avr@instr@stepn{1}%
+ \avr@test@REG{r30}{11111110}
+ \avr@test@REG{r31}{11111111}
+ \avr@test@SREG{00000101}
+
+}
+\preto\avr@test{\avr@test@ADIW}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Run the test-suite
+
+\avr@test
+
+\end{document}
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: t
+%%% End:
+
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/FOOTER b/Master/texmf-dist/source/latex/avremu/test-suite/FOOTER
new file mode 100644
index 00000000000..815ab681a2f
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/FOOTER
@@ -0,0 +1 @@
+\end{document} \ No newline at end of file
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/HEADER b/Master/texmf-dist/source/latex/avremu/test-suite/HEADER
new file mode 100644
index 00000000000..2df95b0ee7a
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/HEADER
@@ -0,0 +1,10 @@
+\documentclass{article}
+\usepackage{graphicx}
+
+\usepackage[debug]{avremu}
+\useavremulibrary{avr.draw}
+
+\errorcontextlines=23
+
+\begin{document}
+\makeatletter
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/complex-memory.c b/Master/texmf-dist/source/latex/avremu/test-suite/complex-memory.c
new file mode 100644
index 00000000000..a05bfdf2adb
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/complex-memory.c
@@ -0,0 +1,22 @@
+#include <avr/io.h>
+
+volatile char foo[30];
+
+int main() {
+ foo[0] = 23;
+ foo[1] = 42;
+ foo[2] = foo[0] + foo[1];
+
+ asm volatile ("break");
+}
+
+/*
+ check-name: Complex Memory Operations
+ check-start:
+ \avr@instr@stepn{1000}
+
+ \avr@test@MEM{96}{00010111} % 23
+ \avr@test@MEM{97}{00101010} % 42
+ \avr@test@MEM{98}{01000001} % 65
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/empty-main.c b/Master/texmf-dist/source/latex/avremu/test-suite/empty-main.c
new file mode 100644
index 00000000000..fa0d0dc57d5
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/empty-main.c
@@ -0,0 +1,10 @@
+int main() {
+ asm volatile ("break");
+}
+
+/**
+ check-name: Run simple main Function
+ check-start:
+\avr@instr@stepn{5000}
+ check-end:
+**/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/fibonacci-rec.c b/Master/texmf-dist/source/latex/avremu/test-suite/fibonacci-rec.c
new file mode 100644
index 00000000000..a3f2f6edf33
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/fibonacci-rec.c
@@ -0,0 +1,20 @@
+#include <avr/io.h>
+
+char fib(char n) {
+ if (n <= 1) {
+ return 1;
+ }
+ return fib(n-1) + fib(n-2);
+}
+
+int main() {
+ UDR = fib(5);
+ asm volatile ("break");
+}
+/*
+ check-name: Fibonacci (Recursive)
+ check-start:
+ \avr@instr@stepn{1000}
+ \avr@test@REG{r24}{00001000}
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/float.c b/Master/texmf-dist/source/latex/avremu/test-suite/float.c
new file mode 100644
index 00000000000..af6a8edebcf
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/float.c
@@ -0,0 +1,41 @@
+#include <avr/io.h>
+#include <stdio.h>
+
+static int uart_putchar(char c, FILE *stream);
+static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
+ _FDEV_SETUP_WRITE);
+static int
+uart_putchar(char c, FILE *stream)
+{
+ UDR = c;
+ return 0;
+}
+
+volatile uint16_t xxx = 65;
+
+int
+main(void)
+{
+ stdout = &mystdout;
+
+ volatile float a = 0.23;
+ volatile float b = 0.43;
+
+ printf("%.2f", 1/ (a * b * 3));
+ asm volatile("break;");
+
+ return 0;
+}
+
+
+/**
+ check-name: Calculate with floats
+ compiler-opts: -Wl,-u,vfprintf -lm -lprintf_flt
+
+ check-start:
+
+ \avr@instr@stepn{100000}
+ \avr@test@UDR{3.37}
+
+ check-end:
+**/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/func-ptr.c b/Master/texmf-dist/source/latex/avremu/test-suite/func-ptr.c
new file mode 100644
index 00000000000..e42f26dbf66
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/func-ptr.c
@@ -0,0 +1,22 @@
+#include <avr/io.h>
+
+// Produces LPM operations
+__attribute__((noinline)) void bar() {
+ UDR='X';
+}
+void (*foo)() = bar;
+
+int main() {
+ bar();
+ foo();
+ asm volatile ("break");
+}
+
+/*
+ check-name: Function Pointers
+ check-start:
+ \avr@instr@stepn{1000000}
+
+ \avr@test@UDR{XX}
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/mandelbrot.c b/Master/texmf-dist/source/latex/avremu/test-suite/mandelbrot.c
new file mode 100644
index 00000000000..e5be7e7e8d7
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/mandelbrot.c
@@ -0,0 +1,116 @@
+/** mandel.c by Eric R. Weeks written 9-28-96
+ ** weeks@physics.emory.edu
+ ** http://www.physics.emory.edu/~weeks/
+ **
+ ** This program is public domain, but this header must be left intact
+ ** and unchanged.
+ **
+ **/
+
+#include <avr/io.h>
+
+#define CMD_COLOR 1
+#define CMD_DOT 2
+
+
+
+static
+void setcolor(uint8_t r, uint8_t g, uint8_t b) {
+ TWDR = r;
+ TWDR = g;
+ TWDR = b;
+ TWAR = CMD_COLOR;
+}
+
+static
+void dot(uint8_t x, uint8_t y) {
+ TWDR = x, TWDR = y;
+ TWAR = CMD_DOT;
+}
+
+
+/* Colors
+import colorsys
+def color(i):
+ h = i/float(100)
+ s = 1.0
+ v = h
+ print h, s, v
+ x = colorsys.hsv_to_rgb(h, s, v)
+ return (str(int(x[0] * 255)),
+ str(int(x[1] * 255)),
+ str(int(x[2] * 255)))
+
+colors = [color (i) for i in range(0, 100)]
+
+print "char color_R[] = {%s};" % (",".join([x[0] for x in colors]))
+print "char color_G[] = {%s};" % (",".join([x[1] for x in colors]))
+print "char color_B[] = {%s};" % (",".join([x[2] for x in colors]))
+ */
+
+char color_R[] = {0,2,5,7,10,12,15,17,20,22,25,28,30,33,35,38,40,42,42,41,40,39,38,36,34,31,29,26,22,19,15,11,6,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,3,13,24,35,47,58,70,83,95,108,121,135,149,163,177,192,207,214,216,219,221,224,226,229,232,234,237,239,242,244,247,249,252};
+char color_G[] = {0,0,0,1,2,3,5,7,9,12,15,18,22,25,29,34,39,43,45,48,51,53,56,58,61,63,66,68,71,73,76,79,81,84,86,89,91,94,96,99,102,104,107,109,112,114,117,119,122,124,127,122,116,110,104,98,91,84,76,69,61,52,44,35,26,16,6,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+char color_B[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,3,8,14,20,27,33,40,48,55,63,71,80,89,98,107,117,127,130,132,135,137,140,142,145,147,150,153,155,158,160,163,165,168,170,173,175,178,181,183,186,188,191,193,196,198,201,204,206,209,211,205,195,184,173,161,149,137,125,112,99,86,72,58,44,29,15};
+
+
+int main() {
+
+ float x,xx,y,cx,cy;
+ uint8_t iteration;
+ uint8_t hx,hy;
+#define itermax 100 /* how many iterations to do */
+#define magnify 4.0 /* no magnification */
+#define hxres 250 /* horizonal resolution */
+#define hyres 250 /* vertical resolution */
+#define ydelta 0
+#define xdelta -0.75
+
+ uint8_t i;
+ for (hy=1;hy<=hyres;hy++) {
+ for (hx=1;hx<=hxres;hx++) {
+ cx = (((float)hx)/((float)hxres)-0.5)/magnify*3.0-0.7;
+ cy = (((float)hy)/((float)hyres)-0.5)/magnify*3.0;
+ cx += xdelta;
+ cy += ydelta;
+ x = 0.0; y = 0.0;
+ for (iteration=1; iteration < itermax; iteration++) {
+ xx = x*x-y*y+cx;
+ y = 2.0*x*y+cy;
+ x = xx;
+ if (x*x+y*y>128.0){
+ i = iteration;
+ iteration = itermax + 1;
+ }
+ }
+ // Print a dot
+ if (iteration<itermax+1) {
+ setcolor(0,0,0);
+ } else {
+ setcolor(color_R[i],
+ color_G[i],
+ color_B[i]);
+ }
+ dot(hx-1, hy-1);
+ }
+ }
+
+ asm volatile ("break");
+}
+
+/*
+ check-name: Mandelbrot Set
+ compiler-opts: -O3
+ check-long: 1
+ check-start:
+ \def\avr@debug#1{}
+
+ \avr@instr@run
+
+ \avrdrawppm{mandelbrot.ppm}
+
+ \immediate\write18{convert mandelbrot.ppm mandelbrot.png}
+
+ \includegraphics[width=\linewidth]{mandelbrot.png}
+
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/mul.c b/Master/texmf-dist/source/latex/avremu/test-suite/mul.c
new file mode 100644
index 00000000000..49f05550198
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/mul.c
@@ -0,0 +1,52 @@
+#include <avr/io.h>
+
+volatile char foo[30];
+
+int main() {
+ foo[0] = 23;
+ foo[1] = 42;
+ // Should produce a mul
+ foo[2] = foo[0] * foo[1];
+
+ // Contains a decrement (8 Bit Dividend)
+ foo[3] = (unsigned char)((unsigned char )foo[1] / (unsigned char)foo[0]);
+
+ foo[4] = foo[1] % foo[0];
+
+ volatile uint16_t x = 1000;
+ volatile uint16_t y = 55;
+
+ foo[5] = x * y;
+ foo[20] = 165;
+
+ itoa((unsigned char)foo[20], &foo[6], 10);
+ itoa((signed char)foo[20], &foo[9], 10);
+
+
+ asm volatile ("break");
+}
+
+/*
+ check-name: Complex Memory Operations
+ check-start:
+ \avr@instr@stepn{100000}
+
+ \avr@test@MEM{96}{00010111} % 23
+ \avr@test@MEM{97}{00101010} % 42
+ \avr@test@MEM{98}{11000110} % 198
+
+ \avr@test@MEM{99}{00000001} % 1
+ \avr@test@MEM{100}{00010011} % 19
+
+ \avr@test@MEM{101}{11011000} % 216
+
+ \avr@test@MEM{102}{00110001} % '1'
+ \avr@test@MEM{103}{00110110} % '6'
+ \avr@test@MEM{104}{00110101} % '5'
+
+ \avr@test@MEM{105}{00101101} % '-'
+ \avr@test@MEM{106}{00111001} % '9'
+ \avr@test@MEM{107}{00110001} % '1'
+
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/printf.c b/Master/texmf-dist/source/latex/avremu/test-suite/printf.c
new file mode 100644
index 00000000000..e8d14fb0782
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/printf.c
@@ -0,0 +1,69 @@
+#include <avr/io.h>
+#include <stdio.h>
+
+char buffer[30];
+
+volatile char buf[3];
+
+static int uart_putchar(char c, FILE *stream);
+static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
+ _FDEV_SETUP_WRITE);
+static int
+uart_putchar(char c, FILE *stream)
+{
+ UDR = c;
+ return 0;
+}
+
+
+int
+main(void)
+{
+ stdout = &mystdout;
+
+ buf[0] = 'x';
+ buf[1] = 'y';
+ buf[2] = '\0';
+
+ puts(buf);
+
+
+ asm volatile("break;");
+
+ printf(":%c", buf[0]);
+
+ asm volatile("break;");
+
+ printf(":%d:", buf[1]);
+
+ asm volatile("break;");
+
+ volatile float x=0.23;
+ printf(":%.2f:", x);
+
+ asm volatile("break;");
+
+ return 0;
+}
+
+
+/**
+ check-name: Print to Stdout
+ compiler-opts: -Wl,-u,vfprintf -lm -lprintf_flt
+ check-start:
+
+ \avr@instr@stepn{100000}
+ \avr@test@UDR{xy^10} % ^10 == \n
+ \def\avr@UDR{}
+
+ \avr@instr@stepn{100000}
+ \avr@test@UDR{:x}
+
+ \avr@instr@stepn{100000}
+ \avr@test@UDR{:121:}
+
+ \avr@instr@stepn{100000}
+ \avr@test@UDR{:0.23:}
+
+ check-end:
+**/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/shift.c b/Master/texmf-dist/source/latex/avremu/test-suite/shift.c
new file mode 100644
index 00000000000..fe64b4ca208
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/shift.c
@@ -0,0 +1,26 @@
+#include <avr/io.h>
+
+volatile char foo[30];
+
+int main() {
+ foo[0] = 5;
+ foo[1] = 42;
+ foo[2] = foo[1] >> foo[0];
+ foo[3] = foo[1] << (foo[0]>>2);
+
+
+ asm volatile ("break");
+}
+
+/*
+ check-name: Shift Operations
+ check-start:
+ \avr@instr@stepn{1000}
+
+ \avr@test@MEM{96}{00000101} % 5
+ \avr@test@MEM{97}{00101010} % 42
+ \avr@test@MEM{98}{00000001} % 0
+ \avr@test@MEM{99}{01010100} % 42
+
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/string.c b/Master/texmf-dist/source/latex/avremu/test-suite/string.c
new file mode 100644
index 00000000000..616598884ed
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/string.c
@@ -0,0 +1,22 @@
+#include <avr/io.h>
+
+// Produces LPM operations
+const char *foo = "abc";
+
+int main() {
+ char* p = foo;
+ while (*p) {
+ UDR = *p++;
+ }
+
+ asm volatile ("break");
+}
+
+/*
+ check-name: String Operations
+ check-start:
+ \avr@instr@stepn{1000000}
+
+ \avr@test@UDR{abc}
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/sum-rec.c b/Master/texmf-dist/source/latex/avremu/test-suite/sum-rec.c
new file mode 100644
index 00000000000..0fa00fc6bc2
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/sum-rec.c
@@ -0,0 +1,23 @@
+#include <avr/io.h>
+
+char sum(char n) {
+ if (n <= 1) {
+ return n;
+ }
+ return n + sum(n-1);
+}
+
+int main() {
+ UDR = sum(4);
+ asm volatile ("break");
+}
+
+/*
+ check-name: Complex Memory Operations
+ check-start:
+
+ \avr@instr@stepn{1000}
+ \avr@test@REG{r24}{00001010}
+
+ check-end:
+*/
diff --git a/Master/texmf-dist/source/latex/avremu/test-suite/test-suite b/Master/texmf-dist/source/latex/avremu/test-suite/test-suite
new file mode 100755
index 00000000000..e54a739f404
--- /dev/null
+++ b/Master/texmf-dist/source/latex/avremu/test-suite/test-suite
@@ -0,0 +1,223 @@
+#!/bin/bash
+
+#set -x
+
+default_path=".."
+tests_list=`find . -name '*.c' | sed -e 's#^\./\(.*\)#\1#' | sort`
+prog_name=`basename $0`
+
+export TEXINPUTS=$PWD/..//:$TEXINPUTS
+
+# counts:
+# - tests that have not been converted to test-suite format
+# - tests that passed
+# - tests that failed
+# - tests that failed but are known to fail
+unhandled_tests=0
+ok_tests=0
+ko_tests=0
+known_ko_tests=0
+
+
+# defaults to not verbose
+[ -z "$V" ] && V=0
+
+##
+# get_value(key, file) - gets the value of a (key, value) pair in file.
+#
+# returns 0 on success, 1 if the file does not have the key
+get_value()
+{
+ last_result=`grep $1: $2 | sed -e "s/^.*$1:\(.*\)$/\1/"`
+ [ -z "$last_result" ] && return 1
+ return 0
+}
+
+##
+# get_tag(key, file) - does file has the tag key in it ?
+#
+# returns 0 if present, 1 otherwise
+get_tag()
+{
+ last_result=`grep $1 $2`
+ return $?
+}
+
+##
+# verbose(string) - prints string if we are in verbose mode
+verbose()
+{
+ [ "$V" -eq "1" ] && echo " $1"
+ return 0
+}
+
+##
+# error(string[, die]) - prints an error and exits with value die if given
+error()
+{
+ echo " error: $1"
+ [ -n "$2" ] && exit $2
+ return 0
+}
+
+do_usage()
+{
+echo "$prog_name - a tiny automatic testing script"
+echo "Usage: $prog_name [command] [command arguments]"
+echo
+echo "commands:"
+echo " none runs the whole test suite"
+echo " single file runs the test in 'file'"
+echo
+echo " help prints usage"
+}
+
+##
+# do_test(file) - tries to validate a test case
+#
+# it "parses" file, looking for check-* tags and tries to validate
+# the test against an expected result
+# returns:
+# - 0 if the test passed,
+# - 1 if it failed,
+# - 2 if it is not a "test-suite" test.
+do_test()
+{
+ test_failed=0
+ file="$1"
+
+ # can this test be handled by test-suite ?
+ # (it has to have a check-name key in it)
+ get_value "check-name" $file
+ if [ "$?" -eq 1 ]; then
+ echo "warning: test '$file' unhandled"
+ unhandled_tests=`expr $unhandled_tests + 1`
+ return 2
+ fi
+ test_name=$last_result
+
+ echo -n "TEST $test_name ($file)"
+
+ cp HEADER "$file".tex
+ get_value compiler-opts "$file"
+ echo "\avrloadc[-Os -mmcu=atmega8 $last_result]{$file}" >> "$file".tex
+
+ awk '/check-start/,/check-end/ {print}' $file \
+ | egrep -v 'check-(start|end)' >> "$file".tex
+ cat FOOTER >> "$file".tex
+
+
+ # grab the actual output & exit value
+ pdflatex -halt-on-error -shell-escape "$file".tex 1> $file.output 2> $file.error
+ actual_exit_value=$?
+ rm -f *.log *.aux
+
+ if [ "$actual_exit_value" -ne 0 ]; then
+ echo
+ error " Actual exit value does not match the expected one."
+ error " expected 0, got $actual_exit_value"
+ if [ x"$V" = x"1" ]; then
+ cat $file.output | sed 's/^/ /'
+ else
+ tail -n 10 $file.output | sed 's/^/ /'
+ fi
+ test_failed=1
+ else
+ get_value BREAK "$file".output
+ echo " ($last_result)" | sed 's/ instructions//' | tr -d "\n"
+ echo
+ fi
+
+ if [ "$test_failed" -eq "1" ]; then
+ ko_tests=`expr $ko_tests + 1`
+ get_tag "check-known-to-fail" $file
+ if [ "$?" -eq "0" ]; then
+ echo "info: test '$file' is known to fail"
+ known_ko_tests=`expr $known_ko_tests + 1`
+ fi
+ return 1
+ else
+ ok_tests=`expr $ok_tests + 1`
+ return 0
+ fi
+}
+
+pwait() {
+ # This functions blocks until less than $1 subprocesses are running
+ jobs="$1"
+ [ -z "$jobs" ] && jobs=5
+
+ while [ $(jobs -r | wc -l) -gt "$jobs" ]; do
+ sleep 0.5
+ done
+}
+
+do_test_suite()
+{
+ for i in $tests_list; do
+ if get_value "check-long" "$i" > /dev/null; then
+ echo "IGNORED $i (long running)"
+ continue
+ fi
+ do_test "$i"
+ done
+
+ # prints some numbers
+ tests_nr=`expr $ok_tests + $ko_tests`
+ echo -n "Out of $tests_nr tests, $ok_tests passed, $ko_tests failed"
+ echo " ($known_ko_tests of them are known to fail)"
+ if [ "$unhandled_tests" -ne "0" ]; then
+ echo "$unhandled_tests tests could not be handled by $prog_name"
+ fi
+}
+
+##
+# arg_file(filename) - checks if filename exists
+arg_file()
+{
+ [ -z "$1" ] && {
+ do_usage
+ exit 1
+ }
+ [ -e "$1" ] || {
+ error "Can't open file $1"
+ exit 1
+ }
+ return 0
+}
+
+case "$1" in
+ '')
+ do_test_suite
+ if test `expr $ko_tests - $known_ko_tests` -gt 0; then
+ for f in *.error.diff *.output.diff; do
+ if test -s "$f"; then
+ echo "Contents of $f:"
+ cat "$f"
+ echo "==="
+ fi
+ done
+ exit 1
+ fi
+ ;;
+ single)
+ arg_file "$2"
+ do_test "$2"
+ case "$?" in
+ 0) echo "$2 passed !";;
+ 1) echo "$2 failed !";;
+ 2) echo "$2 can't be handled by $prog_name";;
+ esac
+ ;;
+ format)
+ arg_file "$2"
+ do_format "$2" "$3" "$4"
+ ;;
+ help | *)
+ do_usage
+ exit 1
+ ;;
+esac
+
+exit 0
+
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.binary.tex b/Master/texmf-dist/tex/latex/avremu/avr.binary.tex
new file mode 100644
index 00000000000..36888c5fcf2
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.binary.tex
@@ -0,0 +1,94 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+%
+% This interacts with the avr-gcc and provides a loader for ihex files
+%
+
+\def\avr@ihex@parse@line:#1#2#3#4#5#6#7#8#9;{%
+ \avr@hex@tobin{#1#2}{\avr@ihex@bytes}%
+ \avr@hex@tobin{#3#4#5#6}{\avr@ihex@address}%
+ \def\avr@ihex@type{#7#8}%
+ \def\avr@ihex@data{#9}%
+}
+
+\def\avr@ihex@readop#1#2#3{%
+ \def\avr@ihex@readop@helper##1##2##3##4##5\@nnil{%
+ \avr@hex@tobin{##3##4##1##2}{#2}%
+ \xdef#3{##5}%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@ihex@readop@helper\@tempa\@nnil%
+}
+
+
+\newcount\avr@ihex@addr
+\newcount\avr@ihex@count
+\newcount\avr@ihex@instrs
+
+\def\avr@ihex@load#1{%
+ \newread\avr@input%
+ \avr@ihex@instrs=0\relax%
+ \openin\avr@input=#1\relax%
+ \@whilesw\unless\ifeof\avr@input\fi{%
+ \endlinechar59% 59==;
+ \readline\avr@input to \avr@line \relax%
+ \endlinechar=-1%
+ \expandafter\ifstrequal\expandafter{\avr@line}{;}{}{%
+ \expandafter\avr@ihex@parse@line \avr@line%
+ \ifdefstring{\avr@ihex@type}{00}{%
+ \avr@bin@tocount{\avr@ihex@bytes}{\avr@ihex@count}%
+ \avr@bin@tocount{\avr@ihex@address}{\avr@ihex@addr}%
+ \divide\avr@ihex@addr by 2\relax%
+ \divide\avr@ihex@count by 2\relax%
+ \loop \ifnum \avr@ihex@count > 0%
+ \avr@ihex@readop{\avr@ihex@data}{\avr@ihex@opcode}{\avr@ihex@data}%
+ \avr@code@set{\avr@ihex@opcode}{\the\avr@ihex@addr}%
+ %\avr@debug{=\avr@ihex@opcode}%
+ \advance \avr@ihex@count by -1\relax%
+ \advance \avr@ihex@addr by 1\relax%
+ \repeat%
+ }{}%
+ }%
+ }%
+ \closein\avr@input%
+}
+
+
+\def\avr@compile#1#2{%
+ \ifnum\pdfshellescape=1%
+ \immediate\write18{rm #1.hex #1.elf}%
+ \immediate\write18{avr-gcc -o #1.elf #1 #2}%
+ \immediate\write18{avr-objcopy -O ihex -R .eeprom #1.elf #1.hex}%
+ \IfFileExists{#1.hex}{}{%
+ \errmessage{avremu: Compilation of Source code failed (#1)}%
+ }%
+ \else%
+ \errmessage{avremu: --shell-escape is disabled; cannot compile}%
+ \fi%
+}
+
+\newcommand{\avrloadc}[2][-Os -mmcu=atmega8]{%
+ \avr@init%
+ \avr@compile{#2}{#1}%
+ \avr@ihex@load{#2.hex}%
+}
+
+\newcommand{\avrcompile}[2][-Os -mmcu=atmega8]{%
+ \avr@compile{#2}{#1}%
+}
+
+\newcommand{\avrloadihex}[1]{%
+ \avr@init%
+ \avr@ihex@load{#1}%
+}
+
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.bitops.tex b/Master/texmf-dist/tex/latex/avremu/avr.bitops.tex
new file mode 100644
index 00000000000..dcec2ae8baa
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.bitops.tex
@@ -0,0 +1,300 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+%
+% This file contains the basic binary operations
+%
+
+\def\avr@zeroes{00000000}
+\def\avr@ones{11111111}
+
+\def\avr@bin@map#1#2#3{% BitMacro, Bitstring, Output Macro
+ \def\avr@bin@foreach@helper##1##2##3##4##5##6##7##8##9\@nnil{%
+ #1{##1}#1{##2}#1{##3}#1{##4}#1{##5}#1{##6}#1{##7}#1{##8}%
+ \ifx&##9&\else%
+ \avr@bin@foreach@helper ##9\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#2}%
+ \edef#3{\expandafter\avr@bin@foreach@helper \@tempa\@nnil}%
+}
+
+
+
+\def\avr@bin@zipmap#1#2#3#4{% Bitmacro{A}{B}, A, B, OutputMacro
+ \def\avr@bin@zipmap@helper##1##2##3;##4##5##6;{%
+ #1{##1}{##4}#1{##2}{##5}%
+ \ifx&##3&%
+ \ifx&##6&\else\avr@error{Wrong Arguments to ZipMap}\fi%
+ \else%
+ \avr@bin@zipmap@helper ##3;##6;%
+ \fi%
+ }%
+ \edef\@tempa{#2;#3;}%
+ \edef#4{\expandafter\avr@bin@zipmap@helper\@tempa}%
+}
+
+\csdef{avr@bit@negate@0}{1}
+\csdef{avr@bit@negate@1}{0}
+\def\avr@bit@negate#1{\csuse{avr@bit@negate@#1}}
+% \avr@bin@negate{A}{\result} -> \result = ~A
+\def\avr@bin@negate{\avr@bin@map{\avr@bit@negate}}
+
+\def\avr@bit@id#1{#1}
+% \avr@bin@id{A}{\result} -> \result = A
+\def\avr@bin@id{\avr@bin@map{\avr@bit@id}}
+
+\csdef{avr@bit@mask@00}{.}
+\csdef{avr@bit@mask@01}{0}
+\csdef{avr@bit@mask@10}{.}
+\csdef{avr@bit@mask@11}{1}
+\def\avr@bit@mask#1#2{\csuse{avr@bit@mask@#1#2}}
+% \avr@bin@mask{value}{mask}{\result} -> \result = ...
+\def\avr@bin@mask{\avr@bin@zipmap{\avr@bit@mask}}
+
+\csdef{avr@bit@and@00}{0}
+\csdef{avr@bit@and@01}{0}
+\csdef{avr@bit@and@10}{0}
+\csdef{avr@bit@and@11}{1}
+\def\avr@bit@and#1#2{\csuse{avr@bit@and@#1#2}}
+% \avr@bin@and{A}{B}{\result} -> \result = A & B
+\def\avr@bin@and{\avr@bin@zipmap{\avr@bit@and}}
+
+\csdef{avr@bit@or@00}{0}
+\csdef{avr@bit@or@01}{1}
+\csdef{avr@bit@or@10}{1}
+\csdef{avr@bit@or@11}{1}
+\def\avr@bit@or#1#2{\csuse{avr@bit@or@#1#2}}
+% \avr@bin@or{A}{B}{\result} -> \result = A | B
+\def\avr@bin@or{\avr@bin@zipmap{\avr@bit@or}}
+
+\csdef{avr@bit@xor@00}{0}
+\csdef{avr@bit@xor@01}{1}
+\csdef{avr@bit@xor@10}{1}
+\csdef{avr@bit@xor@11}{0}
+\def\avr@bit@xor#1#2{\csuse{avr@bit@xor@#1#2}}
+% \avr@bin@xor{A}{B}{\result} -> \result = A | B
+\def\avr@bin@xor{\avr@bin@zipmap{\avr@bit@xor}}
+
+% \avr@bin@getbit bs:byte, bitnum, \result -> \result = (bs >> bitnum)& 1
+\def\avr@bin@getbit#1#2#3{%
+ \avr@count@tmpa=7%
+ \advance\avr@count@tmpa by -#2\relax%
+ \def\avr@bin@getbit@helper##1##2\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \def#3{##1}%
+ \else%
+ \advance\avr@count@tmpa by -1\relax%
+ \avr@bin@getbit@helper##2\@nnil%
+ \fi%
+ }%
+ \edef\@tmpa{#1}%
+ \expandafter\avr@bin@getbit@helper\@tmpa\@nnil%
+}
+
+\def\avr@bin@setbit#1#2#3#4{%
+ \def\@tempa{}%
+ \avr@count@tmpa=7%
+ \advance\avr@count@tmpa by -#2\relax%
+ \def\avr@bin@setbit@helper##1##2\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \xdef\@tempa{\@tempa #3##2}%
+ \else%
+ \advance\avr@count@tmpa by -1\relax%
+ \xdef\@tempa{\@tempa ##1}%
+ \avr@bin@setbit@helper##2\@nnil%
+ \fi%
+ }%
+ \edef\@tmpb{#1}%
+ \expandafter\avr@bin@setbit@helper\@tmpb\@nnil%
+ \edef#4{\@tempa}%
+}
+
+% \avr@bin@btw bs:byte, \result -> \result = 00000000+bs
+\def\avr@bin@btw#1#2{\xdef#2{00000000#1}}
+\def\avr@bin@btw@sign#1#2{%
+ \avr@bin@getbit{#1}{7}{\@tmpa}%
+ \xdef#2{\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa#1}%
+}
+
+\def\avr@bin@word@low#1#2{%
+ \edef\@tempa{#1}%
+ \edef#2{\expandafter\avr@bin@word@low@helper\@tempa\@nnil}%
+}
+\def\avr@bin@word@low@helper#1#2#3#4#5#6#7#8#9\@nnil{#9}
+
+\def\avr@bin@word@high#1#2{%
+ \edef\@tempa{#1}%
+ \edef#2{\expandafter\avr@bin@word@high@helper\@tempa\@nnil}%
+}
+\def\avr@bin@word@high@helper#1#2#3#4#5#6#7#8#9\@nnil{%
+ #1#2#3#4#5#6#7#8%
+}
+
+% \avr@bin@wtb bs:word, \result = ((uint8_t) bs)
+\def\avr@bin@wtb{\avr@bin@word@low}
+
+% \avr@bin@shiftleft bs:(byte|word), count, \result, \carry
+% -> \result = bs << count; \carry = (bs >> count) & 1
+\def\avr@bin@shiftleft#1#2#3#4{%
+ \avr@count@tmpa=#2\relax%
+ \edef#4{0}%
+ \def\avr@bin@shiftleft@helper##1##2\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \edef#3{##1##2}%
+ \else%
+ \edef#4{##1}%
+ \advance \avr@count@tmpa by -1\relax%
+ \avr@bin@shiftleft@helper ##20\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@shiftleft@helper\@tempa\@nnil%
+}
+
+\def\avr@bin@shiftleft@barrel#1#2#3#4{%
+ \avr@count@tmpa=#2\relax%
+ \edef#4{0}%
+ \def\avr@bin@shiftleft@helper##1##2\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \edef#3{##1##2}%
+ \else%
+ \edef#4{##1}%
+ \advance \avr@count@tmpa by -1\relax%
+ \avr@bin@shiftleft@helper ##2##1\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@shiftleft@helper\@tempa\@nnil%
+}
+
+
+% Delete LSB: bs, \result, \carry
+\def\avr@bin@lsb@del#1#2#3{%
+ \def\avr@bin@lsb@del@helper##1##2\@nnil{%
+ \ifx&##2&%
+ \edef#3{##1}%
+ \else%
+ \xdef#2{#2##1}% Append bit to result
+ \avr@bin@lsb@del@helper ##2\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \def#2{}%
+ \expandafter\avr@bin@lsb@del@helper\@tempa\@nnil%
+}
+
+% Get LSB: bs, \result
+\def\avr@bin@lsb@get#1#2{%
+ \def\avr@bin@lsb@get@helper##1##2\@nnil{%
+ \ifx&##2&%
+ \edef#2{##1}%
+ \else%
+ \avr@bin@lsb@get@helper ##2\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@lsb@get@helper\@tempa\@nnil%
+}
+
+% Delete MSB: bs, \result,\carry
+\def\avr@bin@msb@del#1#2#3{%
+ \def\avr@bin@msb@del@helper##1##2\@nnil{%
+ \edef#3{##1}%
+ \edef#2{##2}%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@msb@del@helper\@tempa\@nnil%
+}
+
+% Get MSB: bs, \carry
+\def\avr@bin@msb@get#1#2{%
+ \def\avr@bin@msb@get@helper##1##2\@nnil{%
+ \edef#2{##1}%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@msb@get@helper\@tempa\@nnil%
+}
+
+% Get Higher Nibble: bs, \result
+\def\avr@bin@nibble@high#1#2{%
+ \def\avr@bin@nibble@helper##1##2##3##4##5\@nnil{%
+ \edef#2{##1##2##3##4}%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@nibble@helper\@tempa\@nnil%
+}
+
+% Get Lower Nibble: bs, \result
+\def\avr@bin@nibble@low#1#2{%
+ \def\avr@bin@nibble@helper##1##2##3##4##5\@nnil{%
+ \edef#2{##5}%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@nibble@helper\@tempa\@nnil%
+}
+
+\def\avr@bin@shiftright#1#2#3#4{%
+ \def\avr@bin@shiftright@helper##1\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \edef#3{##1}%
+ \else%
+ \avr@bin@lsb@del{##1}{\avr@bin@shiftright@bs}{\avr@bin@shiftright@carry}%
+ \edef#4{\avr@bin@shiftright@carry}%
+ \advance \avr@count@tmpa by -1\relax%
+ \edef\@tempa{0\avr@bin@shiftright@bs}%
+ \expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \edef#4{0}%
+ \avr@count@tmpa=#2\relax%
+ \expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
+}
+
+\def\avr@bin@shiftright@arith#1#2#3#4{%
+ \def\avr@bin@shiftright@helper##1\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \edef#3{##1}%
+ \else%
+ \avr@bin@msb@get{##1}{\avr@bin@shiftright@sign}%
+ \avr@bin@lsb@del{##1}{\avr@bin@shiftright@bs}{\avr@bin@shiftright@carry}%
+ \edef#4{\avr@bin@shiftright@carry}%
+ \advance \avr@count@tmpa by -1\relax%
+ \edef\@tempa{\avr@bin@shiftright@sign \avr@bin@shiftright@bs}%
+ \expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \edef#4{0}%
+ \avr@count@tmpa=#2\relax%
+ \expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
+}
+
+\def\avr@bin@shiftright@barrel#1#2#3#4{%
+ \def\avr@bin@shiftright@helper##1\@nnil{%
+ \ifnum \avr@count@tmpa = 0%
+ \edef#3{##1}%
+ \else%
+ \avr@bin@lsb@get{##1}{\avr@bin@shiftright@sign}%
+ \avr@bin@lsb@del{##1}{\avr@bin@shiftright@bs}{\avr@bin@shiftright@carry}%
+ \edef#4{\avr@bin@shiftright@carry}%
+ \advance \avr@count@tmpa by -1\relax%
+ \edef\@tempa{\avr@bin@shiftright@sign \avr@bin@shiftright@bs}%
+ \expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
+ \fi%
+ }%
+ \edef\@tempa{#1}%
+ \edef#4{0}%
+ \avr@count@tmpa=#2\relax%
+ \expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
+}
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.draw.tex b/Master/texmf-dist/tex/latex/avremu/avr.draw.tex
new file mode 100644
index 00000000000..5a2a7800761
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.draw.tex
@@ -0,0 +1,145 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+%
+% This library can be used to draw graphics through IO ports
+%
+
+\newcount\avr@draw@x
+\newcount\avr@draw@y
+\newcount\avr@draw@maxx
+\newcount\avr@draw@maxy
+
+\def\avr@draw@init{%
+ \avr@draw@maxx = 0%
+ \avr@draw@maxy = 0%
+}
+
+
+% TWAR
+\newcount\avr@draw@argc
+\csdef{avr@io@000010@set}#1{%
+ \avr@bin@tocount{#1}{\avr@accA}%
+ \avr@log{DRAW CMD: \the\avr@accA}%
+ \avr@draw@command{\the\avr@accA}%
+ \avr@draw@argc = 0\relax%
+}
+
+\csdef{avr@io@000011@set}#1{%
+ \avr@bin@tocount{#1}{\avr@accA}%
+ \avr@debug{AVR DRAW PUSH: \the\avr@accA}%
+ \csxdef{avr@draw@stack@\the\avr@draw@argc}{\the\avr@accA}%
+ \advance\avr@draw@argc by 1\relax%
+}
+
+\def\avr@draw@stack#1{\csuse{avr@draw@stack@#1}}
+
+
+\def\avr@draw@command#1{%
+ \ifcsdef{avr@draw@command@#1}{%
+ \csuse{avr@draw@command@#1}%
+ }{%
+ \avr@error{AVR DRAW: Unkown Command #1}%
+ }%
+}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Draw Commands
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\csdef{avr@draw@command@0}{} % NOP
+
+% Set Color
+\def\avr@draw@color{0,0,0}
+\csdef{avr@draw@command@1}{%
+ \ifnum \avr@draw@argc < 3%
+ \avr@debug{DRAW: Set Draw COLOR, Not enough arguments}%
+ \fi%
+ \xdef\avr@draw@color{\avr@draw@stack{0},\avr@draw@stack{1},\avr@draw@stack{2}}%
+}
+
+% Small Rectangle
+\csdef{avr@draw@command@2}{%
+ \ifnum \avr@draw@argc < 2%
+ \avr@debug{DRAW: Dot, Not enough arguments (2 required)}%
+ \fi%
+ \edef\@@X{\avr@draw@stack{0}}%
+ \edef\@@Y{\avr@draw@stack{1}}%
+ \ifnum \@@X > \avr@draw@maxx%
+ \avr@draw@maxx=\@@X%
+ \fi%
+ \ifnum \@@Y > \avr@draw@maxy%
+ \avr@draw@maxy=\@@Y%
+ \fi%
+ \csxdef{avr@draw@\@@X @\@@Y}{\avr@draw@color}%
+}
+
+
+\newcommand{\avrdrawiter}[1]{%
+ \avr@draw@x=0%
+ \def\avr@iter@yloop{%
+ \avr@draw@x=0%
+ \ifnum \avr@draw@y > \avr@draw@maxy%
+ \let\avr@iter@yloop=\relax%
+ \else%
+ \let\avr@iter@xloop@rec=\avr@iter@xloop%
+ \avr@iter@xloop\relax%
+ \advance \avr@draw@y by 1\relax%
+ \fi%
+ \avr@iter@yloop%
+ }%
+ \def\avr@iter@xloop{%
+ \ifnum \avr@draw@x > \avr@draw@maxx%
+ \let\avr@iter@xloop@rec=\relax%
+ \else%
+ \ifcsdef{avr@draw@\the\avr@draw@x @\the\avr@draw@y}{%
+ #1 {\the\avr@draw@x}{\the\avr@draw@y}{\csuse{avr@draw@\the\avr@draw@x @\the\avr@draw@y}}%
+ }{% Dot not defined
+ }%
+ \advance \avr@draw@x by 1\relax%
+ \fi%
+ \avr@iter@xloop@rec%
+ }%
+ \avr@iter@yloop%
+}
+
+\newcommand{\avrdrawSize}[2]{%
+ \avr@count@tmpa=\avr@draw@maxx%
+ \advance \avr@count@tmpa by 1\relax%
+ \edef#1{\the\avr@count@tmpa}%
+ \avr@count@tmpa=\avr@draw@maxy%
+ \advance \avr@count@tmpa by 1\relax%
+ \edef#2{\the\avr@count@tmpa}%
+}
+
+\newwrite\avr@file%
+
+\newcommand{\avrdrawppm}[1]{%
+ % Dump to .ppm file
+ \immediate\openout\avr@file=#1%
+ \immediate\write\avr@file{P3}%
+ \avrdrawSize{\x}{\y}%
+ \immediate\write\avr@file{\x \space \y \space 255}%
+ \def\removecomma##1,##2,##3,{##1 ##2 ##3}%
+ \newcommand{\avr@draw@ppm}[3]{%
+ \edef\@tempa{##3}%
+ \edef\@tempa{\expandafter \removecomma \@tempa,}%
+ \expandafter\immediate\expandafter\write\expandafter\avr@file\expandafter{\@tempa}%
+ }%
+ \avrdrawiter{\avr@draw@ppm}%
+ \immediate\closeout\avr@file%
+}
+
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: "avr.tex"
+%%% End:
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.instr.tex b/Master/texmf-dist/tex/latex/avremu/avr.instr.tex
new file mode 100644
index 00000000000..b76fcada8f5
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.instr.tex
@@ -0,0 +1,1411 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+%
+% This file contains all opcode implementations
+%
+
+\def\avr@log#1{%
+ \typeout{AVR (\the\avr@instr@executed): #1}%
+}
+
+\def\avr@debug#1{%
+ \typeout{\the\avr@instr@executed:\the\avr@pc: #1}%
+}
+
+\def\avr@error#1{%
+ \avr@dump%
+ \errmessage{\the\avr@pc: #1}\bye%
+}
+
+\newif\ifavrbreak
+\avrbreakfalse
+\newcount\avr@instr@executed
+\def\avr@instr@init{%
+ \avr@instr@executed=0%
+ \avrbreakfalse%
+}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%$
+% Execution Engine
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\newcommand{\avrstep}[1][1]{%
+ \avr@instr@steps{#1}%
+}
+
+\newcommand{\avrrun}{%
+ \avr@instr@run%
+}
+
+\newcommand{\avrsinglestep}{%
+ \avr@instr@singlestep%
+}
+
+\newcommand{\avrinstrcount}{\the\avr@instr@executed}
+
+\def\avr@instr@step{%
+ \avr@code@get{\avr@instr@current}%
+ %\avr@reg@get{\csuse{avr@r24}}{\@@A}%
+ %\avr@reg@get{\csuse{avr@r28}}{\@@B}%
+ %\avr@reg@get{\csuse{avr@r29}}{\@@C}%
+ %\avr@debug{{r24=\@@A} {r28=\@@B} {r29=\@@C}}%
+ %\avr@debug{\avr@instr@current}%
+ % Dispatch Instruction by prefix
+ \expandafter\avr@instr@dispatch\avr@instr@current\@nnil%
+ \advance\avr@instr@executed by 1\relax%
+}
+
+\def\avr@instr@singlestep{%
+ \avr@dump%
+ \typein{Press Enter to Step}%
+ \avr@instr@step%
+ \avr@singlestep%
+}
+
+\newcount\avr@instr@steps
+\def\avr@instr@stepn#1{%
+ \avr@instr@steps=#1%
+ \def\avr@instr@stepn@helper{%
+ \ifnum \avr@instr@steps > 0%
+ \advance \avr@instr@steps by -1\relax%
+ \avr@instr@step%
+ \else%
+ \let\avr@instr@stepn@helper\relax%
+ \fi%
+ \avr@instr@stepn@helper%
+ }%
+ \avr@instr@stepn@helper%
+}
+
+% Run Forever
+\def\avr@instr@run{%
+ \avr@instr@steps=1%
+ \def\avr@instr@stepn@helper{%
+ \ifnum \avr@instr@steps > 0%
+ \avr@instr@step%
+ \else%
+ \let\avr@instr@stepn@helper\relax%
+ \fi%
+ \avr@instr@stepn@helper%
+ }%
+ \avr@instr@stepn@helper%
+}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Opcode decoding
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+\def\avr@instr@dispatch#1#2#3#4#5#6#7#8#9\@nnil{%
+ \ifcsdef{avr@instr@#1#2#3#4#5#6#7#8#9}{%
+ \csuse{avr@instr@#1#2#3#4#5#6#7#8#9}\@nnil%
+ }{\ifcsdef{avr@instr@#1#2#3#4#5#6#7#8}{%
+ \csuse{avr@instr@#1#2#3#4#5#6#7#8}#9\@nnil%
+ }{\ifcsdef{avr@instr@#1#2#3#4#5#6#7}{%
+ \csuse{avr@instr@#1#2#3#4#5#6#7}#8#9\@nnil%
+ }{\ifcsdef{avr@instr@#1#2#3#4#5#6}{%
+ \csuse{avr@instr@#1#2#3#4#5#6}#7#8#9\@nnil%
+ }{\ifcsdef{avr@instr@#1#2#3#4#5}{%
+ \csuse{avr@instr@#1#2#3#4#5}#6#7#8#9\@nnil%
+ }{\ifcsdef{avr@instr@#1#2#3#4}{%
+ \csuse{avr@instr@#1#2#3#4}#5#6#7#8#9\@nnil%
+ }{\ifcsdef{avr@instr@#1#2#3}{%
+ \csuse{avr@instr@#1#2#3}#4#5#6#7#8#9\@nnil%
+ }{\ifcsdef{avr@instr@#1#2}{%
+ \csuse{avr@instr@#1#2}#3#4#5#6#7#8#9\@nnil%
+ }{\ifcsdef{avr@instr@#1}{%
+ \csuse{avr@instr@#1}#2#3#4#5#6#7#8#9\@nnil%
+ }{% Not found
+ \avr@instr@matchspecial{#1#2#3#4#5#6#7#8#9}%
+ }}}}}}}}}%
+}
+
+\def\avr@instr@matchend#1#2#3#4#5#6#7#8#9\@nnil{%
+ \ifcsdef{avr@instr@#1:#2#3#4#5#6#7#8#9}{%
+ \csuse{avr@instr@#1:#2#3#4#5#6#7#8#9}\@nnil%
+ }{\ifcsdef{avr@instr@#1:#3#4#5#6#7#8#9}{%
+ \csuse{avr@instr@#1:#3#4#5#6#7#8#9}#2\@nnil%
+ }{\ifcsdef{avr@instr@#1:#4#5#6#7#8#9}{%
+ \csuse{avr@instr@#1:#4#5#6#7#8#9}#2#3\@nnil%
+ }{\ifcsdef{avr@instr@#1:#5#6#7#8#9}{%
+ \csuse{avr@instr@#1:#5#6#7#8#9}#2#3#4\@nnil%
+ }{\ifcsdef{avr@instr@#1:#6#7#8#9}{%
+ \csuse{avr@instr@#1:#6#7#8#9}#2#3#4#5\@nnil%
+ }{\ifcsdef{avr@instr@#1:#7#8#9}{%
+ \csuse{avr@instr@#1:#7#8#9}#2#3#4#5#6\@nnil%
+ }{\ifcsdef{avr@instr@#1:#9}{%
+ \csuse{avr@instr@#1:#9}#2#3#4#5#6#7#8\@nnil%
+ }{% Not found
+ \avr@instr@matchspecial{#1#2#3#4#5#6#7#8#9}%
+ }}}}}}}%
+}
+
+\def\avr@instr@matchspecial#1{%
+ \avr@bin@mask{#1}{1101001000001000}{\@@masked}%
+ \avr@bin@mask{#1}{0010110111110111}{\@@args}%
+
+ \ifcsdef{avr@instr@special@\@@masked}{%
+ \def\@tempa{\csuse{avr@instr@special@\@@masked}}%
+ \expandafter\@tempa\@@args\@nnil%
+ }{%
+ \avr@error{Unkown Instruction: #1}%
+ }%
+}
+
+% How long is a specific instruction (for Skip one instr)
+\def\avr@instr@length#1#2{% Addr, Length
+ \avr@code@load{#1}{\@@code}%
+ \avr@bin@and{\@@code}{1111110000001111}{\@@LDS}%
+ \ifdefstring{\@@LDS}{1001000000000000}{%
+ \def#2{2}%
+ }{%
+ \def#2{1}%
+ }%
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Match also from end for these prefixes
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\csdef{avr@instr@1001010}{\avr@instr@matchend{1001010}}
+% POP/PUSH
+\csdef{avr@instr@1001000}{\avr@instr@matchend{1001000}}
+\csdef{avr@instr@1001001}{\avr@instr@matchend{1001001}}
+% LD(XYZ)
+\csdef{avr@instr@1000000}{\avr@instr@matchend{1000000}}
+\csdef{avr@instr@1000001}{\avr@instr@matchend{1000001}}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Helpers
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\def\avr@instr@gen@tworegs#1#2#3#4{%
+ \avr@bin@msb@del{#3}{\avr@ADD@dddd}{\avr@ADD@d}%
+ \avr@bin@msb@del{#4}{\avr@ADD@rrrr}{\avr@ADD@r}%
+ \avr@code@set{#1\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#2}%
+}
+
+\def\avr@instr@gen@regconst#1#2#3#4{%
+ \avr@bin@msb@del{#3}{\avr@LDI@dddd}{\avr@LDI@d}%
+ \avr@bin@nibble@high{#4}{\avr@LDI@H}%
+ \avr@bin@nibble@low{#4}{\avr@LDI@L}%
+ \avr@code@set{#1\avr@LDI@H\avr@LDI@dddd\avr@LDI@L}{#2}%
+}
+
+\def\avr@instr@gen@onereg#1#2#3#4{%
+ \avr@code@set{#1#4#2}{#3}%
+}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Arithmetic instructions
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% ADD -- Add without Carry
+\def\avr@instr@ADD{\avr@instr@gen@tworegs{000011}}
+\def\avr@instr@LSL#1#2{\avr@instr@gen@tworegs{000011}{#1}{#2}{#2}}
+\csdef{avr@instr@000011}#1#2#3#4#5#6#7\@nnil{%
+ \def\avr@instr@extracarry{0}%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \avr@debug{ADD - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
+ \avr@debug{ADD - \avr@Rd <- \avr@Rd + \avr@Rr}%
+ \csuse{avr@instr@adder@helper}%
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+
+% ADC -- Add with Carry
+\def\avr@instr@ADC{\avr@instr@gen@tworegs{000111}}
+\def\avr@instr@ROL#1#2{\avr@instr@ADC{#1}{#2}{#2}}
+\csdef{avr@instr@000111}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \avr@flag@get C \avr@instr@extracarry%
+ \avr@debug{ADC - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
+ \avr@debug{ADC - \avr@Rd <- \avr@Rd + \avr@Rr + \avr@instr@extracarry}%
+ \csuse{avr@instr@adder@helper}%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+
+% SUB -- Substract without carry
+\def\avr@instr@SUB{\avr@instr@gen@tworegs{000110}}
+\csdef{avr@instr@000110}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \def\avr@instr@extracarry{1}%
+ \avr@debug{SUB - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
+ \avr@debug{SUB - \avr@Rd <- \avr@Rd - \avr@Rr}%
+ \csuse{avr@instr@subber@helper}%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+% SBC - Substract with Carry
+\def\avr@instr@SBC{\avr@instr@gen@tworegs{000010}}
+\csdef{avr@instr@000010}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \avr@flag@get C \@@carry%
+ \xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
+ \avr@debug{SBC - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
+ \avr@debug{SBC - \avr@Rd <- \avr@Rd - \avr@Rr - \@@carry}%
+ \csuse{avr@instr@subber@helper}%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+
+% SUBI - Substract Immediate
+\def\avr@instr@SUBI{\avr@instr@gen@regconst{0101}}
+\csdef{avr@instr@0101}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \avr@reg@get{1#5#6#7#8}{\avr@Rd}%
+ \def\avr@Rr{#1#2#3#4#9}%
+ \def\avr@instr@extracarry{1}%
+ \avr@debug{SUBI - \%#2#3#4#5#6 <- #2#3#4#5#6(=\avr@Rd) - \avr@Rr}%
+ \csuse{avr@instr@subber@helper}%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{1#5#6#7#8}%
+ \avr@pc@inc%
+}
+
+% SBCI - Substract Immediate with Carry
+\def\avr@instr@SBCI{\avr@instr@gen@regconst{0100}}
+\csdef{avr@instr@0100}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \avr@reg@get{1#5#6#7#8}{\avr@Rd}%
+ \def\avr@Rr{#1#2#3#4#9}%
+ \avr@flag@get C \@@carry%
+ \avr@flag@get Z \@@oldZ%
+ \xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
+ \avr@debug{SBCI - \%#2#3#4#5#6 <- #2#3#4#5#6(=\avr@Rd) - \avr@Rr -\@@carry}%
+ \csuse{avr@instr@subber@helper}%
+ \avr@flag@get Z \@@newZ%
+ \avr@flag@set Z {\avr@bit@and \@@oldZ \@@newZ}%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{1#5#6#7#8}%
+ \avr@pc@inc%
+}
+
+% CP -- Compare without Carry
+\def\avr@instr@CP{\avr@instr@gen@tworegs{000101}}
+\csdef{avr@instr@000101}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \def\avr@instr@extracarry{1}%
+ \avr@debug{CP - #2#3#4#5#6(=\avr@Rd) - \%#1#7(=\avr@Rr)}%
+ \csuse{avr@instr@subber@helper}%
+ % Do not set the output register
+ \avr@pc@inc%
+}
+
+% CPC -- Compare with Carry
+\def\avr@instr@CPC{\avr@instr@gen@tworegs{000001}}
+\csdef{avr@instr@000001}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \avr@flag@get C \@@carry%
+ \avr@flag@get Z \@@oldZ%
+ \xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
+ \avr@debug{CPC - #2#3#4#5#6(=\avr@Rd) - \%#1#7(=\avr@Rr) - \@@carry}%
+ \csuse{avr@instr@subber@helper}%
+ \avr@flag@get Z \@@newZ%
+ \avr@flag@set Z {\avr@bit@and \@@oldZ \@@newZ}%
+ % Do not set the output register
+ \avr@pc@inc%
+}
+
+% CPI - Compare Immediate
+\def\avr@instr@CPI{\avr@instr@gen@regconst{0011}}
+\csdef{avr@instr@0011}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \avr@reg@get{1#5#6#7#8}{\avr@Rd}%
+ \def\avr@Rr{#1#2#3#4#9}%
+ \avr@flag@get C \@@carry%
+ \xdef \avr@instr@extracarry{1}%
+ \avr@debug{CPI - \%#2#3#4#5#6 <- #2#3#4#5#6(=\avr@Rd) - \avr@Rr -\@@carry}%
+ \csuse{avr@instr@subber@helper}%
+ % Set the result register
+ \avr@pc@inc%
+}
+
+\csdef{avr@instr@adder@helper}{%
+ % Convert the Bitstring to Integer values
+ \avr@bin@tocount{\avr@Rd}{\avr@accA}%
+ \avr@bin@tocount{\avr@Rr}{\avr@accB}%
+ \advance \avr@accA by \avr@accB\relax%
+ \advance \avr@accA by \avr@instr@extracarry\relax%
+ \avr@count@modulo@byte{\avr@accA}%
+ \avr@count@tobin@b{\avr@accA}{\avr@Rx}%
+ % Calculate the Flags
+ \let\@@not=\avr@bit@negate%
+ \let\@@and=\avr@bit@and%
+ \let\@@or=\avr@bit@or%
+ %% Carry
+ \avr@bin@msb@get{\avr@Rr}{\@@R}%
+ \avr@bin@msb@get{\avr@Rd}{\@@D}%
+ \avr@bin@msb@get{\avr@Rx}{\@@X}%
+ \avr@debug{{Rr7:\@@R} {Rd7:\@@D} {R7:\@@X}}%
+ % \avr@debug{R: \@@R D: \@@D X:\@@X}%
+ \def\avr@ADD@carry{%
+ \@@or {\@@and \@@R \@@D}%
+ {%
+ \@@or{\@@and \@@R {\@@not \@@X}}%
+ {\@@and \@@D {\@@not \@@X}}}}%
+ \avr@flag@set C {\avr@ADD@carry}%
+ % Two's Complement Overflow
+ \def\@@tmp{\@@or%
+ {\@@and \@@D {\@@and \@@R {\@@not \@@X}}}%
+ {\@@and {\@@not \@@D} {\@@and {\@@not \@@R} \@@X}}}%
+ \avr@flag@set V \@@tmp%
+ % Half Carry
+ \avr@bin@getbit{\avr@Rr}{3}{\@@R}%
+ \avr@bin@getbit{\avr@Rd}{3}{\@@D}%
+ \avr@bin@getbit{\avr@Rx}{3}{\@@X}%
+ \def\avr@ADD@carry{%
+ \@@or {\@@and \@@D {\@@not \@@X}}%
+ {%
+ \@@or{\@@and \@@R \@@D}%
+ {\@@and \@@R {\@@not \@@X}}}}%
+ \avr@flag@set H {\avr@ADD@carry}%
+ %% Update Dependend Flags (N, Z, S)
+ \avr@flags@update \avr@Rx%
+}
+
+\csdef{avr@instr@subber@helper}{%
+ % Convert the Bitstring to Integer values
+ \avr@bin@tocount{\avr@Rd}{\avr@accA}%
+ \avr@bin@negate{\avr@Rr}{\@@Rr}%
+ \avr@bin@tocount{\@@Rr}{\avr@accB}%
+ \advance \avr@accA by \avr@accB\relax%
+ \advance \avr@accA by \avr@instr@extracarry\relax%
+ \avr@count@modulo@byte{\avr@accA}%
+ \avr@count@tobin@b{\avr@accA}{\avr@Rx}%
+ % Calculate the Flags
+ \let\@@not=\avr@bit@negate%
+ \let\@@and=\avr@bit@and%
+ \let\@@or=\avr@bit@or%
+ %% Carry
+ \avr@bin@msb@get{\avr@Rr}{\@@R}%
+ \avr@bin@msb@get{\avr@Rd}{\@@D}%
+ \avr@bin@msb@get{\avr@Rx}{\@@X}%
+ \avr@debug{{Rr7:\@@R} {Rd7:\@@D} {R7:\@@X}}%
+ \def\avr@ADD@carry{%
+ \@@or {\@@and {\@@not \@@D} \@@R}%
+ {%
+ \@@or{\@@and \@@R \@@X}%
+ {\@@and \@@X {\@@not \@@D}}}}%
+ \avr@flag@set C {\avr@ADD@carry}%
+ % Two's Complement Overflow
+ \def\@@tmp{\@@or%
+ {\@@and \@@D {\@@and {\@@not \@@R} {\@@not \@@X}}}%
+ {\@@and {\@@not \@@D} {\@@and \@@R \@@X}}}%
+ \avr@flag@set V \@@tmp%
+ % Half Carry
+ \avr@bin@getbit{\avr@Rr}{3}{\@@R}%
+ \avr@bin@getbit{\avr@Rd}{3}{\@@D}%
+ \avr@bin@getbit{\avr@Rx}{3}{\@@X}%
+ \def\avr@ADD@carry{%
+ \@@or {\@@and {\@@not \@@D} \@@R}%
+ {%
+ \@@or{\@@and \@@R \@@X}%
+ {\@@and \@@X {\@@not \@@D}}}}%
+ \avr@flag@set H {\avr@ADD@carry}%
+ %% Update Dependend Flags (N, Z, S)
+ \avr@flags@update \avr@Rx%
+}
+
+% INC, DEC
+\def\avr@instr@INC#1#2{\avr@code@set{1001010#20011}{#1}}
+\csdef{avr@instr@1001010:0011}#1\@nnil{%
+ \avr@instr@INCDEC@helper{#1}{1}%
+}
+\def\avr@instr@DEC#1#2{\avr@code@set{1001010#21010}{#1}}
+\csdef{avr@instr@1001010:1010}#1\@nnil{%
+ \avr@instr@INCDEC@helper{#1}{-1}%
+}
+
+\csdef{avr@instr@INCDEC@helper}#1#2{%
+ \avr@reg@get{#1}{\avr@Rd}%
+ \avr@debug{INCDEC #1(=\avr@Rd) +(#2)}%
+ \avr@bin@tocount{\avr@Rd}{\avr@accA}%
+ \advance \avr@accA by #2\relax%
+ \avr@count@modulo@byte{\avr@accA}%
+ \avr@count@tobin@b{\avr@accA}{\avr@Rx}%
+ \ifdefstring{\avr@Rx}{01111111}{%
+ \avr@flag@set V 1%
+ }{%
+ \avr@flag@set V 0%
+ }%
+ \avr@flags@update \avr@Rx%
+ \avr@reg@set{\avr@Rx}{#1}%
+ \avr@pc@inc%
+}
+
+% ADIW
+\def\avr@instr@ADIW#1#2#3{% Reg, K
+ \edef\@@K{#3}%
+ \avr@bin@msb@del{\@@K}{\@@K}{\@@a}%
+ \avr@bin@msb@del{\@@K}{\@@K}{\@@b}%
+ \avr@code@set{10010110\@@a\@@b#2\@@K}{#1}%
+}
+
+\csdef{avr@instr@10010110}#1#2#3#4#5\@nnil{%
+ \def\@@K{00#1#2#5}%
+ \avr@regw@get{11#3#4}{\avr@Rd}%
+ \avr@debug{ADIW #3#4 + \@@K}%
+ \avr@bin@tocount{\avr@Rd}{\avr@accA}%
+ \avr@bin@tocount{\@@K}{\avr@accB}%
+ \advance \avr@accA by \avr@accB\relax%
+ \avr@count@overflow{\avr@accA}%
+ \avr@count@tobin@w{\avr@accA}{\avr@Rx}%
+ % Calculate the Flags
+ \let\@@not=\avr@bit@negate%
+ \let\@@and=\avr@bit@and%
+ \let\@@xor=\avr@bit@xor%
+ \avr@bin@msb@get{\avr@Rx}{\@@X}%
+ \avr@bin@msb@get{\avr@Rd}{\@@D}%
+ % Zero Flag
+ \ifdefstring{\avr@Rx}{0000000000000000}{%
+ \avr@flag@set Z 1%
+ }{%
+ \avr@flag@set Z 0%
+ }%
+ \avr@flag@set C {\@@and {\@@not \@@X} \@@D}%
+ \avr@flag@set N \@@X%
+ \edef\@@V{\@@and {\@@not \@@D} \@@X}%
+ \avr@flag@set V \@@V%
+ \avr@flag@set S {\@@xor \@@X \@@V}%
+ % Set the Result
+ \avr@regw@set{\avr@Rx}{11#3#4}%
+ \avr@pc@inc%
+}
+
+% Substract Immediate From Word
+\def\avr@instr@SBIW#1#2#3{% Reg, K
+ \edef\@@K{#3}%
+ \avr@bin@msb@del{\@@K}{\@@K}{\@@a}%
+ \avr@bin@msb@del{\@@K}{\@@K}{\@@b}%
+ \avr@code@set{10010111\@@a\@@b#2\@@K}{#1}%
+}
+
+\csdef{avr@instr@10010111}#1#2#3#4#5\@nnil{%
+ \def\@@K{00#1#2#5}%
+ \avr@regw@get{11#3#4}{\avr@Rd}%
+ \avr@debug{SBIW #3#4 + \@@K}%
+ \avr@bin@tocount{\avr@Rd}{\avr@accA}%
+ \avr@bin@tocount{\@@K}{\avr@accB}%
+ \advance \avr@accA by -\avr@accB\relax%
+ \avr@count@overflow{\avr@accA}%
+ \avr@count@tobin@w{\avr@accA}{\avr@Rx}%
+ % Calculate the Flags
+ \let\@@not=\avr@bit@negate%
+ \let\@@and=\avr@bit@and%
+ \let\@@xor=\avr@bit@xor%
+ \avr@bin@msb@get{\avr@Rx}{\@@X}%
+ \avr@bin@msb@get{\avr@Rd}{\@@D}%
+ % Zero Flag
+ \ifdefstring{\avr@Rx}{0000000000000000}{%
+ \avr@flag@set Z 1%
+ }{%
+ \avr@flag@set Z 0%
+ }%
+ \avr@flag@set C {\@@and \@@X {\@@not \@@D}}%
+ \avr@flag@set N \@@X%
+ \avr@flag@set V {\@@and {\@@not \@@X} \@@D}%
+ \avr@flag@set S {\@@xor \@@X {\@@and {\@@not \@@D} \@@X}}%
+ % Set the Result
+ \avr@regw@set{\avr@Rx}{11#3#4}%
+ \avr@pc@inc%
+}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Branch Instructions
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Encode 6 Bit Value to PC Offset
+\def\avr@instr@jump@enc#1#2{%
+ \avr@count@tmpa=#1%
+ \ifnum #1 < 0%
+ \avr@count@tmpb=\avr@count@tmpa%
+ \avr@count@tmpa=255%
+ \advance \avr@count@tmpa by \avr@count@tmpb\relax%
+ \advance \avr@count@tmpa by 1\relax%
+ \fi%
+ \avr@count@tobin@b{\avr@count@tmpa}{\@@res}%
+ \avr@bin@msb@del{\@@res}{#2}{\@tempa}%
+}
+\def\avr@instr@jump@dec#1#2{%
+ \avr@bin@tocount{0#1}{\avr@count@tmpa}%
+ \ifnum \avr@count@tmpa > 63%
+ \avr@count@tmpb=\avr@count@tmpa%
+ \avr@count@tmpa=-128%
+ \advance \avr@count@tmpa by \avr@count@tmpb\relax%
+ \fi%
+ #2=\avr@count@tmpa\relax%
+}
+
+\def\avr@instr@rjump@dec#1#2{%
+ \avr@bin@tocount{0000#1}{\avr@count@tmpa}%
+ \ifnum \avr@count@tmpa > 2047%
+ \avr@count@tmpb=\avr@count@tmpa%
+ \avr@count@tmpa=-4096%
+ \advance \avr@count@tmpa by \avr@count@tmpb\relax%
+ \fi%
+ #2=\avr@count@tmpa\relax%
+}
+
+% BRBC -- Branch if Bit in SREG is cleared
+\def\avr@instr@BRBC#1#2#3{% ADD PC, Bit, Offset
+ \avr@instr@jump@enc{#3}{\@@offset}%
+ \avr@code@set{111101\@@offset#2}{#1}%
+}
+
+% BRBS -- Branch if Bit in SREG is set
+\def\avr@instr@BRBS#1#2#3{% ADD PC, Bit, Offset
+ \avr@instr@jump@enc{#3}{\@@offset}%
+ \avr@code@set{111100\@@offset#2}{#1}%
+}
+
+% BRCC - Branch if Carry Cleared
+\def\avr@instr@BRCC#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{000}{#2}%
+}
+% BRSH - Branch if Same or Higher
+\def\avr@instr@BRSH{\avr@instr@BRCC}
+
+% BRCS - Branch if Carry Set
+\def\avr@instr@BRCS#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{000}{#2}%
+}
+% BRSH - Branch if Lower
+\def\avr@instr@BRLO{\avr@instr@BRCS}
+
+
+% BRHC - Branch if Half Carry Cleared
+\def\avr@instr@BRHC#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{101}{#2}%
+}
+% BRHS - Branch if Half Carry Set
+\def\avr@instr@BRHS#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{101}{#2}%
+}
+
+% BRID - Branch if Global Interrupt Disabled
+\def\avr@instr@BRID#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{111}{#2}%
+}
+% BRIE - Branch if Global Interrupt Enabled
+\def\avr@instr@BRIE#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{111}{#2}%
+}
+
+% BRMI - Branch if Minus
+\def\avr@instr@BRMI#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{010}{#2}%
+}
+% BRPL - Branch if Plus
+\def\avr@instr@BRPL#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{010}{#2}%
+}
+% BRNE - Branch if Not Equal
+\def\avr@instr@BRNE#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{001}{#2}%
+}
+% BREQ - Branch if Equal
+\def\avr@instr@BREQ#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{001}{#2}%
+}
+
+% BRTC - Branch if T flag cleared
+\def\avr@instr@BRTC#1#2{% PC, Offset
+ \avr@instr@BRTC{#1}{110}{#2}%
+}
+% BRTS - Branch if T flag set
+\def\avr@instr@BRTS#1#2{% PC, Offset
+ \avr@instr@BRTS{#1}{110}{#2}%
+}
+
+% BRVC - Branch if Overflow flag cleared
+\def\avr@instr@BRVC#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{011}{#2}%
+}
+% BRVS - Branch if Overflow flag set
+\def\avr@instr@BRVS#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{011}{#2}%
+}
+
+% BRGE - Branch if greater Equal (signed)
+\def\avr@instr@BRGE#1#2{% PC, Offset
+ \avr@instr@BRBC{#1}{100}{#2}%
+}
+% BRLT - Branch if less than (signed)
+\def\avr@instr@BRLT#1#2{% PC, Offset
+ \avr@instr@BRBS{#1}{100}{#2}%
+}
+
+% #1 = Value to be reached
+\csdef{avr@instr@11110}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \edef\@@required{\avr@bit@negate #1}%
+ \def\@@offset{#2#3#4#5#6#7#8}%
+ \def\@@bit{00000#9}%
+ \avr@sreg@get{\@@sreg}%
+ \avr@bin@tocount{\@@bit}{\avr@count@tmpa}%
+ \edef\@@bit{\the\avr@count@tmpa}%
+ \avr@bin@getbit{\@@sreg}{\@@bit}{\@@found}%
+ \avr@count@tmpa=\@@required%
+ \avr@count@tmpb=\@@found\relax%
+ \avr@debug{BRB{CS} - (\@@sreg[\@@bit] == \@@required) ? +\@@offset : +0}%
+ \ifnum \avr@count@tmpa = \avr@count@tmpb%
+ \avr@instr@jump@dec{\@@offset}{\avr@count@tmpa}%
+ \avr@debug{BRB -- JUMP \the\avr@count@tmpa}%
+ \avr@pc@add{\avr@count@tmpa}%
+ \fi%
+ \avr@pc@inc%
+}
+
+% RJMP
+% #1 = Offset
+% FIXME latex assembler
+\csdef{avr@instr@1100}#1\@nnil{%
+ \avr@instr@rjump@dec{#1}{\avr@count@tmpa}%
+ \avr@debug{RJMP \the\avr@count@tmpa}%
+ \avr@pc@add{\avr@count@tmpa}%
+ \avr@pc@inc%
+}
+
+% RCALL
+\def\avr@CALL@helper#1{%
+ \edef\@@pc{#1}%
+ \avr@bin@word@low{\@@pc}{\@@low}%
+ \avr@bin@word@high{\@@pc}{\@@high}%
+ \avr@mem@set{\@@low}{\the\avr@stackptr}%
+ \advance\avr@stackptr by -1\relax%
+ \avr@mem@set{\@@high}{\the\avr@stackptr}%
+ \advance\avr@stackptr by -1\relax%
+ \avr@pc@inc%
+ \avr@debug{ done}%
+}
+\csdef{avr@instr@1101}#1\@nnil{%
+ \avr@count@tobin@w{\the\avr@pc}{\@@pc}%
+ \avr@instr@rjump@dec{#1}{\avr@count@tmpa}%
+ \avr@reg@get{\csuse{avr@r24}}{\@@A}%
+ \avr@reg@get{\csuse{avr@r25}}{\@@B}%
+ \avr@reg@get{\csuse{avr@r26}}{\@@C}%
+ \avr@debug{RCALL \the\avr@count@tmpa {r24:\@@A} {r25:\@@B} {r26:\@@C}}%
+ \avr@CALL@helper{\@@pc}%
+ \avr@pc@add{\avr@count@tmpa}%
+}
+
+\def\avr@instr@ICALL#1{\avr@code@set{1001010100001001}{#1}}
+\csdef{avr@instr@1001010100001001}\@nnil{%
+ \avr@count@tobin@w{\the\avr@pc}{\@@pc}%
+ \avr@regw@get{\csuse{avr@Z}}{\@@addr}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@reg@get{\csuse{avr@r24}}{\@@A}%
+ \avr@reg@get{\csuse{avr@r25}}{\@@B}%
+ \avr@reg@get{\csuse{avr@r26}}{\@@C}%
+ \avr@debug{ICALL \the\avr@addr {r24:\@@A} {r25:\@@B} {r26:\@@C}}%
+ \avr@CALL@helper{\@@pc}%
+ \avr@pc=\avr@addr%
+}
+
+\def\avr@instr@IJMP#1{\avr@code@set{1001010000001001}{#1}}
+\csdef{avr@instr@1001010000001001}\@nnil{%
+ \avr@count@tobin@w{\the\avr@pc}{\@@pc}%
+ \avr@regw@get{\csuse{avr@Z}}{\@@addr}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@reg@get{\csuse{avr@r24}}{\@@a}%
+ \avr@reg@get{\csuse{avr@r25}}{\@@b}%
+ \avr@reg@get{\csuse{avr@r26}}{\@@c}%
+ \avr@debug{IJMP \the\avr@addr {r24:\@@a} {r25:\@@b} {r26:\@@c}}%
+ \avr@pc=\avr@addr%
+}
+
+% RET
+\def\avr@instr@RET#1{%
+ \avr@code@set{1001010100001000}{#1}%
+}
+\csdef{avr@instr@1001010100001000}\@nnil{%
+ \avr@reg@get{\csuse{avr@r24}}{\@@X}%
+ \avr@debug{RET (r24=\@@X)}%
+ \advance\avr@stackptr by 1\relax%
+ \avr@mem@get{\the\avr@stackptr}{\@@high}%
+ \advance\avr@stackptr by 1\relax%
+ \avr@mem@get{\the\avr@stackptr}{\@@low}%
+ \avr@bin@tocount{\@@high \@@low}{\avr@pc}%
+ \avr@pc@inc\relax%
+ \avr@debug{ done }%
+}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Data transfert instructions
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% MOV
+\def\avr@instr@MOV{\avr@instr@gen@tworegs{001011}}
+\csdef{avr@instr@001011}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@set{\avr@Rr}{#2#3#4#5#6}%
+ \avr@debug{MOV - #2#3#4#5#6 <- #1#7(=\avr@Rr)}%
+ \avr@pc@inc%
+}
+
+% MOVW
+\def\avr@instr@MOVW#1#2#3{%
+ \avr@bin@lsb@del{#2}{\avr@LDI@dddd}{\avr@LDI@d}%
+ \avr@bin@lsb@del{#3}{\avr@LDI@rrrr}{\avr@LDI@r}%
+ \avr@code@set{00000001\avr@LDI@dddd\avr@LDI@rrrr}{#1}%
+}
+\csdef{avr@instr@00000001}#1#2#3#4#5\@nnil{%
+ \avr@reg@get{#50}{\avr@Rr}%
+ \avr@reg@set{\avr@Rr}{#1#2#3#40}%
+ \avr@reg@get{#51}{\avr@Rd}%
+ \avr@reg@set{\avr@Rd}{#1#2#3#41}%
+ \avr@debug{MOV - #1#2#3#4[01] <- #5[01](=\avr@Rr:\avr@Rd)}%
+ \avr@pc@inc%
+}
+
+% PUSH
+\def\avr@instr@PUSH#1#2{% PC, Reg
+ \avr@code@set{1001001#21111}{#1}%
+}
+
+\csdef{avr@instr@1001001:1111}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@debug{PUSH #1(=\avr@Rr)}%
+ \avr@mem@set{\avr@Rr}{\the\avr@stackptr}%
+ \advance\avr@stackptr by -1\relax%
+ \avr@pc@inc%
+}
+
+% POP
+\def\avr@instr@POP#1#2{% PC, Reg
+ \avr@code@set{1001000#21111}{#1}%
+}
+\csdef{avr@instr@1001000:1111}#1\@nnil{%
+ \advance\avr@stackptr by 1\relax%
+ \avr@debug{POP #1}%
+ \avr@mem@get{\the\avr@stackptr}{\avr@Rr}%
+ \avr@reg@set{\avr@Rr}{#1}%
+ \avr@pc@inc%
+}
+
+\newcount\avr@addr
+\def\avr@instr@LDD@helper#1#2#3#4{%
+ % PreIncrement, RegisterW, PostIncrement, Target
+ \avr@regw@get{\csuse{avr@#2}}{\@@addr}%
+ \avr@debug{LD #4 <- *(#1:#2:#3,#2=\@@addr)}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \advance \avr@addr by #1\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@mem@get{\the\avr@addr}{\avr@Rx}%
+ \advance \avr@addr by #3\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@count@tobin@w{\avr@addr}{\@@addr}%
+ \avr@regw@set{\@@addr}{\csuse{avr@#2}}%
+ \avr@reg@set{\avr@Rx}{#4}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@STS@helper#1#2#3#4{%
+ % PreIncrement, RegisterW, PostIncrement, SourceReg
+ \avr@regw@get{\csuse{avr@#2}}{\@@addr}%
+ \avr@reg@get{#4}{\avr@Rd}%
+ \avr@debug{ST #4 -> *(#1:#2:#3,#2=\@@addr)}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \advance \avr@addr by #1\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@mem@set{\avr@Rd}{\the\avr@addr}%
+ \advance \avr@addr by #3\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@count@tobin@w{\avr@addr}{\@@addr}%
+ \avr@regw@set{\@@addr}{\csuse{avr@#2}}%
+ \avr@pc@inc%
+}
+
+% LD(X)
+\def\avr@instr@LDX{\avr@instr@gen@onereg{1001000}{1100}}
+\def\avr@instr@LDXp{\avr@instr@gen@onereg{1001000}{1101}}
+\def\avr@instr@LDmX{\avr@instr@gen@onereg{1001000}{1110}}
+
+\csdef{avr@instr@1001000:1100}#1\@nnil{%
+ \avr@instr@LDD@helper{0}{X}{0}{#1}%
+}
+\csdef{avr@instr@1001000:1101}#1\@nnil{%
+ \avr@instr@LDD@helper{0}{X}{1}{#1}%
+}
+\csdef{avr@instr@1001000:1110}#1\@nnil{%
+ \avr@instr@LDD@helper{-1}{X}{0}{#1}%
+}
+
+% LD(Y)
+\def\avr@instr@LDY{\avr@instr@gen@onereg{1000000}{1000}}
+\def\avr@instr@LDYp{\avr@instr@gen@onereg{1001000}{1001}}
+\def\avr@instr@LDmY{\avr@instr@gen@onereg{1001000}{1010}}
+
+\csdef{avr@instr@1000000:1000}#1\@nnil{%
+ \avr@instr@LDD@helper{0}{Y}{0}{#1}%
+}
+\csdef{avr@instr@1001000:1001}#1\@nnil{%
+ \avr@instr@LDD@helper{0}{Y}{1}{#1}%
+}
+\csdef{avr@instr@1001000:1010}#1\@nnil{%
+ \avr@instr@LDD@helper{-1}{Y}{0}{#1}%
+}
+
+% LD(Z)
+\def\avr@instr@LDZ{\avr@instr@gen@onereg{1000000}{0000}}
+\def\avr@instr@LDZp{\avr@instr@gen@onereg{1001000}{0001}}
+\def\avr@instr@LDmZ{\avr@instr@gen@onereg{1001000}{0010}}
+
+\csdef{avr@instr@1000000:0000}#1\@nnil{%
+ \avr@instr@LDD@helper{0}{Z}{0}{#1}%
+}
+\csdef{avr@instr@1001000:0001}#1\@nnil{%
+ \avr@instr@LDD@helper{0}{Z}{1}{#1}%
+}
+\csdef{avr@instr@1001000:0010}#1\@nnil{%
+ \avr@instr@LDD@helper{-1}{Z}{0}{#1}%
+}
+
+% ST(X,Y,Z)
+\def\avr@instr@STX{\avr@instr@gen@onereg{1001001}{1100}}
+\def\avr@instr@STXp{\avr@instr@gen@onereg{1001001}{1101}}
+\def\avr@instr@STmX{\avr@instr@gen@onereg{1001001}{1110}}
+
+\csdef{avr@instr@1001001:1100}#1\@nnil{%
+ \avr@instr@STS@helper{0}{X}{0}{#1}%
+}
+\csdef{avr@instr@1001001:1101}#1\@nnil{%
+ \avr@instr@STS@helper{0}{X}{1}{#1}%
+}
+\csdef{avr@instr@1001001:1110}#1\@nnil{%
+ \avr@instr@STS@helper{-1}{X}{0}{#1}%
+}
+
+\def\avr@instr@STY{\avr@instr@gen@onereg{1000001}{1000}}
+\def\avr@instr@STYp{\avr@instr@gen@onereg{1001001}{1001}}
+\def\avr@instr@STmY{\avr@instr@gen@onereg{1001001}{1010}}
+
+\csdef{avr@instr@1000001:1000}#1\@nnil{%
+ \avr@instr@STS@helper{0}{Y}{0}{#1}%
+}
+\csdef{avr@instr@1001001:1001}#1\@nnil{%
+ \avr@instr@STS@helper{0}{Y}{1}{#1}%
+}
+\csdef{avr@instr@1001001:1010}#1\@nnil{%
+ \avr@instr@STS@helper{-1}{Y}{0}{#1}%
+}
+
+\def\avr@instr@STZ{\avr@instr@gen@onereg{1000001}{0000}}
+\def\avr@instr@STZp{\avr@instr@gen@onereg{1001001}{0001}}
+\def\avr@instr@STmZ{\avr@instr@gen@onereg{1001001}{0010}}
+
+\csdef{avr@instr@1000001:0000}#1\@nnil{%
+ \avr@instr@STS@helper{0}{Z}{0}{#1}%
+}
+\csdef{avr@instr@1001001:0001}#1\@nnil{%
+ \avr@instr@STS@helper{0}{Z}{1}{#1}%
+}
+\csdef{avr@instr@1001001:0010}#1\@nnil{%
+ \avr@instr@STS@helper{-1}{Z}{0}{#1}%
+}
+
+% Special Stores & Loads
+
+% LD R <- Y+q
+\csdef{avr@instr@special@10.0..0.....1...}..#1.#2.#3.#4\@nnil{%
+ \avr@debug{LD reg(#3) <- Y+#1#2#4}%
+ \avr@regw@get{\csuse{avr@Y}}{\@@addr}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
+ \advance \avr@addr by \avr@count@tmpa\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@mem@get{\the\avr@addr}{\avr@Rd}%
+ \avr@reg@set{\avr@Rd}{#3}%
+ \avr@pc@inc%
+}
+
+% LD R <- Z+q
+\csdef{avr@instr@special@10.0..0.....0...}..#1.#2.#3.#4\@nnil{%
+ \avr@debug{LD reg(#3) <- Z+#1#2#4}%
+ \avr@regw@get{\csuse{avr@Z}}{\@@addr}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
+ \advance \avr@addr by \avr@count@tmpa\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@mem@get{\the\avr@addr}{\avr@Rd}%
+ \avr@reg@set{\avr@Rd}{#3}%
+ \avr@pc@inc%
+}
+
+% ST Y+q <- R
+\csdef{avr@instr@special@10.0..1.....1...}..#1.#2.#3.#4\@nnil{%
+ \avr@debug{ST Y+#1#2#4 <- reg(#3)}%
+ \avr@regw@get{\csuse{avr@Y}}{\@@addr}%
+ \avr@reg@get{#3}{\avr@Rd}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
+ \advance \avr@addr by \avr@count@tmpa\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@mem@set{\avr@Rd}{\the\avr@addr}%
+ \avr@pc@inc%
+}
+
+% ST Z+q <- R
+\csdef{avr@instr@special@10.0..1.....0...}..#1.#2.#3.#4\@nnil{%
+ \avr@debug{ST Z+#1#2#4 <- reg(#3)}%
+ \avr@regw@get{\csuse{avr@Z}}{\@@addr}%
+ \avr@reg@get{#3}{\avr@Rd}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
+ \advance \avr@addr by \avr@count@tmpa\relax%
+ \avr@count@overflow{\avr@addr}\relax%
+ \avr@mem@set{\avr@Rd}{\the\avr@addr}%
+ \avr@pc@inc%
+}
+
+% STS/LTS (16 Bit)
+\def\avr@instr@LDSS#1#2#3{%
+ \avr@bin@nibble@low{0#3}{\@@low}%
+ \avr@bin@nibble@high{0#3}{\@@high}%
+ \avr@bin@msb@del{#2}{\@@dddd}{\@tempa}%
+ \avr@code@set{1010\@@high\@@dddd\@@low}{#1}%
+}
+\def\avr@instr@STSS#1#2#3{%
+ \avr@bin@nibble@low{1#3}{\@@low}%
+ \avr@bin@nibble@high{1#3}{\@@high}%
+ \avr@bin@msb@del{#2}{\@@dddd}{\@tempa}%
+ \avr@code@set{1010\@@high\@@dddd\@@low}{#1}%
+}
+
+\def\avr@instr@LDSTS#1#2#3#4#5#6#7#8\@nnil{%
+ \avr@bin@tocount{{\avr@bit@negate #3}#3#1#2#8}{\avr@addr}%
+ \def\avr@RD{1#4#5#6#7}%
+}
+\csdef{avr@instr@10100}#1\@nnil{%
+ \avr@instr@LDSTS#1\@nnil%
+ \avr@debug{LDSS - \avr@RD <- (\the\avr@addr)}%
+ \avr@mem@get{\the\avr@addr}{\@@value}%
+ \avr@reg@set{\@@value}{\avr@RD}%
+ \avr@pc@inc%
+}
+\csdef{avr@instr@10101}#1\@nnil{%
+ \avr@instr@LDSTS#1\@nnil%
+ \avr@debug{STSS - \avr@RD <- (\the\avr@addr)}%
+ \avr@reg@get{\avr@RD}{\@@value}%
+ \avr@mem@set{\@@value}{\the\avr@addr}%
+ \avr@pc@inc%
+}
+
+% LDS/STS (FULL)
+\def\avr@instr@LDS#1#2#3{%
+ \avr@code@set{1001000#20000}{#1}%
+ \avr@count@tmpa=#1%
+ \advance \avr@count@tmpa by 1\relax%
+ \avr@code@set{#3}{\the\avr@count@tmpa}%
+}
+
+\def\avr@instr@STS#1#2#3{%
+ \avr@code@set{1001001#20000}{#1}%
+ \avr@count@tmpa=#1%
+ \advance \avr@count@tmpa by 1\relax%
+ \avr@code@set{#3}{\the\avr@count@tmpa}%
+}
+
+\csdef{avr@instr@1001001:0000}#1\@nnil{%
+ \avr@pc@inc%
+ \avr@code@get{\@@addr}%
+ \avr@reg@get{#1}{\@@value}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@debug{STS - #1 -> (\the\avr@addr)}%
+ \avr@mem@set{\@@value}{\the\avr@addr}%
+ \avr@pc@inc%
+}
+\csdef{avr@instr@1001000:0000}#1\@nnil{%
+ \avr@pc@inc%
+ \avr@code@get{\@@addr}%
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \avr@debug{LDS - #1 <- (\the\avr@addr)}%
+ \avr@mem@get{\the\avr@addr}{\@@value}%
+ \avr@reg@set{\@@value}{#1}%
+ \avr@pc@inc%
+}
+
+% LPM Commands
+\def\avr@instr@LPM#1{\avr@code@set{1001010111001000}{#1}}
+\def\avr@instr@LPMZ{\avr@instr@gen@onereg{1001000}{0100}}
+\def\avr@instr@LPMZp{\avr@instr@gen@onereg{1001000}{0101}}
+
+\csdef{avr@instr@1001010111001000}\@nnil{%
+ \avr@LPM@helper{00000}{0}%
+}
+\csdef{avr@instr@1001000:0100}#1\@nnil{%
+ \avr@LPM@helper{#1}{0}%
+}
+\csdef{avr@instr@1001000:0101}#1\@nnil{%
+ \avr@LPM@helper{#1}{1}%
+}
+\def\avr@LPM@helper#1#2{%
+ \avr@regw@get{\csuse{avr@Z}}{\@@addr}%
+ \avr@bin@lsb@del{\@@addr}{\@@instr}{\@@switch}%
+ \avr@bin@tocount{0\@@instr}{\avr@addr}%
+ \avr@code@load{\the\avr@addr}{\@@code}%
+ \avr@debug{LPM #1 <- code(\the\avr@addr)+\@@switch+#2}%
+ % Increment
+ \avr@bin@tocount{\@@addr}{\avr@addr}%
+ \advance \avr@addr by #2\relax%
+ \avr@count@tobin@w{\avr@addr}{\@@addr}%
+ \avr@regw@set{\@@addr}{\csuse{avr@Z}}%
+ \expandafter \ifnum \@@switch = 1%
+ \avr@bin@word@high{\@@code}{\@@value}%
+ \else%
+ \avr@bin@word@low{\@@code}{\@@value}%
+ \fi%
+ \avr@reg@set{\@@value}{#1}%
+ \avr@pc@inc%
+}
+
+% LDI -- Load Immediate Value
+\def\avr@instr@LDI{\avr@instr@gen@regconst{1110}}
+\def\avr@instr@SER#1#2{\avr@instr@gen@regconst{1110}{#1}{#2}{11111111}}
+\csdef{avr@instr@1110}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \avr@debug{LDI - \%1#5#6#7#8 <- #1#2#3#4#9}%
+ \avr@reg@set{#1#2#3#4#9}{1#5#6#7#8}%
+ \avr@pc@inc%
+}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Misc
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\def\avr@instr@BREAK#1{% BREAK PC
+ \avr@code@set{1001010110011000}{#1}%
+}
+
+\csdef{avr@instr@1001010110011000}\@nnil{%
+ \avr@debug{BREAK: (\the\avr@instr@executed) instructions}%
+ \avr@instr@steps=0\relax%
+ \avrbreaktrue%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@NOP#1{%
+ \avr@code@set{0000000000000000}{#1}%
+}
+
+\csdef{avr@instr@0000000000000000}\@nnil{%
+ \avr@debug{NOP}%
+ \avr@pc@inc%
+}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Logical Instructions
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\def\avr@instr@bitop@helper{%
+ \avr@debug{\avr@instr@bitop - {\avr@Rd} AND {\avr@Rr}}%
+ \csuse{avr@bin@\avr@instr@bitop}{\avr@Rr}{\avr@Rd}{\avr@Rx}%
+ \avr@flag@set V 0%
+ \avr@flags@update \avr@Rx%
+}
+
+\def\avr@instr@AND{\avr@instr@gen@tworegs{001000}}
+\def\avr@instr@TST#1#2{\avr@instr@gen@tworegs{001000}{#1}{#2}{#2}}
+\csdef{avr@instr@001000}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \def\avr@instr@bitop{and}%
+ \avr@instr@bitop@helper%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@ANDI{\avr@instr@gen@regconst{0111}}
+\csdef{avr@instr@0111}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \avr@reg@get{1#5#6#7#8}{\avr@Rd}%
+ \def\avr@Rr{#1#2#3#4#9}%
+ \def\avr@instr@bitop{and}%
+ \avr@instr@bitop@helper%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{1#5#6#7#8}%
+ \avr@pc@inc%
+}
+
+
+\def\avr@instr@OR{\avr@instr@gen@tworegs{001010}}
+\csdef{avr@instr@001010}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \def\avr@instr@bitop{or}%
+ \avr@instr@bitop@helper%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@ORI{\avr@instr@gen@regconst{0110}}
+\def\avr@instr@SBR{\avr@instr@ORI}
+\csdef{avr@instr@0110}#1#2#3#4#5#6#7#8#9\@nnil{%
+ \avr@reg@get{1#5#6#7#8}{\avr@Rd}%
+ \def\avr@Rr{#1#2#3#4#9}%
+ \def\avr@instr@bitop{or}%
+ \avr@instr@bitop@helper%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{1#5#6#7#8}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@EOR{\avr@instr@gen@tworegs{001001}}
+\def\avr@instr@CLR#1#2{\avr@instr@EOR{#1}{#2}{#2}}
+\csdef{avr@instr@001001}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \def\avr@instr@bitop{xor}%
+ \avr@instr@bitop@helper%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@BSET#1#2{%
+ \avr@code@set{100101000#21000}{#1}%
+}
+\def\avr@instr@SEC#1{\avr@instr@BSET{#1}{000}}
+\def\avr@instr@SEZ#1{\avr@instr@BSET{#1}{001}}
+\def\avr@instr@SEN#1{\avr@instr@BSET{#1}{010}}
+\def\avr@instr@SEV#1{\avr@instr@BSET{#1}{011}}
+\def\avr@instr@SES#1{\avr@instr@BSET{#1}{100}}
+\def\avr@instr@SEH#1{\avr@instr@BSET{#1}{101}}
+\def\avr@instr@SET#1{\avr@instr@BSET{#1}{110}}
+\def\avr@instr@SEI#1{\avr@instr@BSET{#1}{111}}
+
+
+\def\avr@instr@BCLR#1#2{%
+ \avr@code@set{100101001#21000}{#1}%
+}
+\def\avr@instr@CLC#1{\avr@instr@BCLR{#1}{000}}
+\def\avr@instr@CLZ#1{\avr@instr@BCLR{#1}{001}}
+\def\avr@instr@CLN#1{\avr@instr@BCLR{#1}{010}}
+\def\avr@instr@CLV#1{\avr@instr@BCLR{#1}{011}}
+\def\avr@instr@CLS#1{\avr@instr@BCLR{#1}{100}}
+\def\avr@instr@CLH#1{\avr@instr@BCLR{#1}{101}}
+\def\avr@instr@CLT#1{\avr@instr@BCLR{#1}{110}}
+\def\avr@instr@CLI#1{\avr@instr@BCLR{#1}{111}}
+
+
+
+\def\avr@instr@BSET@helper#1#2{%
+ % BSET
+ \csdef{avr@instr@100101000#11000}\@nnil{%
+ \avr@debug{BSET #1 #2}%
+ \avr@flag@set #2 1%
+ \avr@pc@inc%
+ }%
+ \csdef{avr@instr@100101001#11000}\@nnil{%
+ \avr@debug{BCLR #2}%
+ \avr@flag@set #2 0%
+ \avr@pc@inc%
+ }\relax%
+}
+\avr@instr@BSET@helper{000}{C}
+\avr@instr@BSET@helper{001}{Z}
+\avr@instr@BSET@helper{010}{N}
+\avr@instr@BSET@helper{011}{V}
+\avr@instr@BSET@helper{100}{S}
+\avr@instr@BSET@helper{101}{H}
+\avr@instr@BSET@helper{110}{T}
+\avr@instr@BSET@helper{111}{I}
+
+\def\avr@instr@BST#1#2#3{\avr@code@set{1111101#20#3}{#1}}
+\csdef{avr@instr@1111101}#1#2#3#4#5#6\@nnil{%
+ \avr@reg@get{#1#2#3#4#5}{\avr@Rd}%
+ \avr@bin@tocount{0000#6}{\avr@count@tmpa}%
+ \edef\@@X{\the\avr@count@tmpa}%
+ \avr@debug{BST T <- #1#2#3#4#5(=\avr@Rd):\@@X}%
+ \avr@bin@getbit{\avr@Rd}{\@@X}{\@@T}%
+ \avr@flag@set T \@@T%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@BLD#1#2#3{\avr@code@set{1111100#20#3}{#1}}
+\csdef{avr@instr@1111100}#1#2#3#4#5#6\@nnil{%
+ \avr@bin@tocount{0000#6}{\avr@count@tmpa}%
+ \avr@reg@get{#1#2#3#4#5}{\avr@Rd}%
+ \edef\@@X{\the\avr@count@tmpa}%
+ \avr@flag@get T \@@T%
+ \avr@debug{BLD #1#2#3#4#5(=\avr@Rd) |= \@@T<<\@@X}%|
+ \avr@bin@setbit{\avr@Rd}{\@@X}{\@@T}{\avr@Rd}%
+ \avr@reg@set{\avr@Rd}{#1#2#3#4#5}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@NEG#1#2{\avr@code@set{1001010#20001}{#1}}
+\csdef{avr@instr@1001010:0001}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@debug{NEG: #1(=\avr@Rr)}%
+ \def\avr@Rd{00000000}%
+ \def\avr@instr@extracarry{1}%
+ \csuse{avr@instr@subber@helper}%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#1}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@COM#1#2{\avr@code@set{1001010#20000}{#1}}
+\csdef{avr@instr@1001010:0000}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@debug{COM: #1(=\avr@Rr)}%
+ \avr@bin@negate{\avr@Rr}{\avr@Rx}%
+ \avr@flag@set C 1%
+ \avr@flag@set V 0%
+ \avr@flags@update \avr@Rx%
+ % Set the result register
+ \avr@reg@set{\avr@Rx}{#1}%
+ \avr@pc@inc%
+}
+
+% Skip if Bit in Register is Set (or not)
+\def\avr@instr@SBRC#1#2#3{\avr@code@set{1111110#20#3}{#1}}
+\def\avr@instr@SBRS#1#2#3{\avr@code@set{1111111#20#3}{#1}}
+
+\def\avr@skip@instr@eq#1#2{%
+ \ifdefstrequal{#1}{#2}{%
+ \avr@pc@inc%
+ \avr@instr@length{\the\avr@pc}{\@@length}%
+ \avr@debug{SKIP (\@@length) instruction}%
+ \avr@pc@add{\@@length}%
+ }{%
+ \avr@pc@inc%
+ }%
+}
+\csdef{avr@instr@111111}#1#2#3#4#5#6#7\@nnil{%
+ \def\@@required{#1}% 1 if if set
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rr}%
+ \avr@bin@tocount{0000#7}{\avr@count@tmpa}%
+ \edef\@@bit{\the\avr@count@tmpa}%
+ \avr@bin@getbit{\avr@Rr}{\@@bit}{\@@found}%
+ \avr@debug{SBR[SC] Skip iff \avr@Rr:\@@bit(\@@found) == \@@required}%
+ \avr@skip@instr@eq{\@@required}{\@@found}%
+}
+
+% CPSE - Compare Skip iff Equal
+\def\avr@instr@CPSE{\avr@instr@gen@tworegs{000100}}
+\csdef{avr@instr@000100}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \avr@debug{CPSE - \avr@Rd + \avr@Rr}%
+ \avr@skip@instr@eq{\avr@Rd}{\avr@Rr}%
+}
+
+% Skip if Bit in IO-Register is Set (or not)
+\def\avr@instr@SBIC#1#2#3{\avr@code@set{10011001#2#3}{#1}}
+\def\avr@instr@SBIS#1#2#3{\avr@code@set{10011011#2#3}{#1}}
+\csdef{avr@instr@10011011}{%
+ \def\@@required{1}% 1 if if set
+ \avr@SBI@helper%
+}
+\csdef{avr@instr@10011001}{%
+ \def\@@required{0}% 0 if if set
+ \avr@SBI@helper%
+}
+\def\avr@SBI@helper#1#2#3#4#5#6\@nnil{%
+ \avr@io@get{0#1#2#3#4#5}{\avr@Rr}%
+ \avr@bin@tocount{00000#6}{\avr@count@tmpa}%
+ \edef\@@bit{\the\avr@count@tmpa}%
+ \avr@bin@getbit{\avr@Rr}{\@@bit}{\@@found}%
+ \avr@debug{SBI[SC] Skip iff \avr@Rr:\@@bit(\@@found) == \@@required}%
+ \avr@skip@instr@eq{\@@required}{\@@found}%
+}
+
+
+% Arithmetic Shift Right
+\def\avr@instr@ASR#1#2{\avr@code@set{1001010#20101}{#1}}
+\csdef{avr@instr@1001010:0101}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@debug{ASR: #1(=\avr@Rr)}%
+ \avr@bin@shiftright@arith{\avr@Rr}{1}{\avr@Rx}{\@@carry}%
+ \avr@bin@msb@get{\avr@Rx}{\@@N}%
+ \avr@flag@set C \@@carry%
+ \avr@flag@set V {\avr@bit@xor \@@carry \@@N}%
+ \avr@flags@update \avr@Rx%
+ \avr@reg@set{\avr@Rx}{#1}%
+ \avr@pc@inc%
+}
+
+
+% LSL is implemented as ADD
+\def\avr@instr@LSR#1#2{\avr@code@set{1001010#20110}{#1}}
+\csdef{avr@instr@1001010:0110}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@debug{LSR #1(=\avr@Rr)}%
+ \avr@bin@shiftright{\avr@Rr}{1}{\avr@Rx}{\@@carry}%
+ \avr@bin@msb@get{\avr@Rx}{\@@N}%
+ \avr@flag@set C \@@carry%
+ \avr@flag@set V {\avr@bit@xor \@@carry \@@N}%
+ \avr@flags@update \avr@Rx%
+ \avr@reg@set{\avr@Rx}{#1}%
+ \avr@pc@inc%
+}
+
+% ROL is implemented as ADD
+\def\avr@instr@ROR#1#2{\avr@code@set{1001010#20111}{#1}}
+\csdef{avr@instr@1001010:0111}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@flag@get C \@@carry%
+ \avr@debug{ROR: #1(=\@@carry:\avr@Rr)}%
+ \avr@bin@lsb@del{\@@carry\avr@Rr}{\avr@Rx}{\@@carry}%
+ \avr@bin@msb@get{\avr@Rx}{\@@N}%
+ \avr@flag@set C \@@carry%
+ \avr@flag@set V {\avr@bit@xor \@@carry \@@N}%
+ \avr@flags@update \avr@Rx%
+ \avr@reg@set{\avr@Rx}{#1}%
+ \avr@pc@inc%
+}
+
+\def\avr@instr@SWAP#1#2{\avr@code@set{1001010#20010}{#1}}
+\csdef{avr@instr@1001010:0010}#1\@nnil{%
+ \avr@reg@get{#1}{\avr@Rr}%
+ \avr@debug{SWAP: #1(=\avr@Rr)}%
+ \avr@bin@nibble@low{\avr@Rr}{\@@low}%
+ \avr@bin@nibble@high{\avr@Rr}{\@@high}%
+ \avr@reg@set{\@@low \@@high}{#1}%
+ \avr@pc@inc%
+}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Multiplication Commands
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% MUL -- Multiply Unsigned Integers
+\newcount\avr@MUL@A
+\newcount\avr@MUL@B
+
+\def\avr@instr@MUL{\avr@instr@gen@tworegs{100111}}
+\csdef{avr@instr@100111}#1#2#3#4#5#6#7\@nnil{%
+ \avr@reg@get{#1#7}{\avr@Rr}%
+ \avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
+ \avr@bin@tocount{\avr@Rr}{\avr@MUL@A}%
+ \avr@bin@tocount{\avr@Rd}{\avr@MUL@B}%
+ \avr@debug{MUL - \the\avr@MUL@A * \the\avr@MUL@B}%
+ \multiply \avr@MUL@A by \avr@MUL@B\relax%
+ \avr@count@tobin@w{\avr@MUL@A}{\avr@Rx}%
+ \avr@bin@word@low{\avr@Rx}{\@@low}%
+ \avr@bin@word@high{\avr@Rx}{\@@high}%
+ \avr@reg@set{\@@low}{\csuse{avr@r0}}%
+ \avr@reg@set{\@@high}{\csuse{avr@r1}}%
+ % Flags
+ \avr@bin@msb@get{\avr@Rx}{\@@carry}%
+ \avr@flag@set C \@@carry%
+ \ifdefstring{\avr@Rx}{0000000000000000}{%
+ \avr@flag@set Z 1%
+ }{%
+ \avr@flag@set Z 0%
+ }%
+ % Do not set the output register
+ \avr@pc@inc%
+}
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.io.tex b/Master/texmf-dist/tex/latex/avremu/avr.io.tex
new file mode 100644
index 00000000000..c89f9d58686
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.io.tex
@@ -0,0 +1,122 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+%%
+%% The IO Subsystem
+%%
+
+\newcommand{\avrUDR}{%
+ \avr@UDR%
+}
+\newcommand{\avrUDRclear}{%
+ \def\avr@UDR{}%
+}
+
+\def\avr@io@init{%
+ \def\avr@UDR{}%
+}
+
+% OUT
+\def\avr@instr@OUT#1#2#3{% A, R
+ \def\@@A{#2}%
+ \avr@bin@msb@del{\@@A}{\@@A}{\@@a}%
+ \avr@bin@msb@del{\@@A}{\@@A}{\@@b}%
+ \avr@code@set{10111\@@a\@@b#3\@@A}{#1}%
+}
+
+\csdef{avr@instr@10111}#1#2#3#4#5#6#7#8\@nnil{%
+ \def\@@IOA{#1#2#8}%
+ \avr@reg@get{#3#4#5#6#7}{\avr@Rr}%
+ \avr@debug{OUT \@@IOA <- \avr@Rr}%
+ \avr@io@set{\avr@Rr}{\@@IOA}%
+ \avr@pc@inc%
+}
+
+% IN
+\def\avr@instr@IN#1#2#3{% A, R
+ \def\@@A{#2}%
+ \avr@bin@msb@del{\@@A}{\@@A}{\@@a}%
+ \avr@bin@msb@del{\@@A}{\@@A}{\@@b}%
+ \avr@code@set{10110\@@a\@@b#3\@@A}{#1}%
+}
+
+\csdef{avr@instr@10110}#1#2#3#4#5#6#7#8\@nnil{%
+ \avr@debug{IN #1#2#8 -> #3#4#5#6#7}%
+ \edef\@@IOA{#1#2#8}%
+ \avr@io@get{\@@IOA}{\avr@Rr}%
+ \avr@reg@set{\avr@Rr}{#3#4#5#6#7}%
+ \avr@pc@inc%
+}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% IO Handlers
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% #1=Value, #2=Addr
+\def\avr@io@set#1#2{%
+ \ifcsdef{avr@io@#2@set}{%
+ \csuse{avr@io@#2@set}{#1}%
+ }{%
+ \avr@io@set@default{#1}{#2}%
+ }%
+}
+% #1=Addr, #2=\result
+\def\avr@io@get#1#2{%
+ \avr@debug{ IO R #1}%
+ \ifcsdef{avr@io@#1@get}{%
+ \csuse{avr@io@#1@get}{#2}%
+ }{%
+ \avr@io@get@default{#1}{#2}%
+ }%
+}
+
+\def\avr@io@set@default#1#2{%
+ \avr@error{IO Port #2 is not defined (OUT <-#1)}%
+}
+
+\def\avr@io@get@default#1#2{%
+ \avr@error{IO Port #1 is not defined (IN ->#2)}%
+}
+
+\csdef{avr@io@111111@set}#1{%
+ \avr@debug{ SREG=#1}%
+ \avr@sreg@set{#1}%
+}
+\csdef{avr@io@111111@get}#1{\avr@sreg@get{#1}}
+
+% Stackpointer IO Ports
+\csdef{avr@io@111110@set}#1{\avr@stack@SPH@set{#1}}
+\csdef{avr@io@111101@set}#1{\avr@stack@SPL@set{#1}}
+\csdef{avr@io@111110@get}#1{\avr@stack@SPH@get{#1}}
+\csdef{avr@io@111101@get}#1{\avr@stack@SPL@get{#1}}
+
+\csdef{avr@io@001100@set}#1{%
+ \avr@bin@tocount{#1}{\avr@count@tmpa}%
+ \avr@ascii{\the\avr@count@tmpa}{\@@char}%
+ \avr@debug{UDR: \the\avr@count@tmpa}%
+ \xdef\avr@UDR{\avr@UDR \@@char}%
+}
+
+% SPDR
+\csdef{avr@io@001111@set}#1{%
+ \csdef{avr@io@001111}{#1}%
+}
+
+\csdef{avr@io@001111@get}#1{%
+ \xdef#1{\csuse{avr@io@001111}}%
+}
+
+
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: "avr.tex"
+%%% End:
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.memory.tex b/Master/texmf-dist/tex/latex/avremu/avr.memory.tex
new file mode 100644
index 00000000000..92f3e34e939
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.memory.tex
@@ -0,0 +1,343 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+%
+% The IO subsystem
+%
+
+%% Bootup
+\def\avr@init{%
+ \avr@flag@init%
+ \avr@reg@init%
+ \avr@pc@init%
+ \avr@stack@init%
+ \avr@mem@init{1024}%
+ \avr@io@init%
+ \avr@instr@init%
+ \avr@debug{Initialized AVR}%
+}
+
+\newcount\avr@accA
+\newcount\avr@accB
+
+
+\def\avr@dump@totex{%
+ SREG:\avr@sreg@get{\@tempa}:='\@tempa' (ITHS VNZC)
+
+ \ttfamily
+ \begin{tabular}{llllllll}
+ r0 :\avr@reg@get{00000}{\@tempa}:= '\@tempa' &
+ r1 :\avr@reg@get{00001}{\@tempa}:= '\@tempa' &
+ r2 :\avr@reg@get{00010}{\@tempa}:= '\@tempa' &
+ r3 :\avr@reg@get{00011}{\@tempa}:= '\@tempa' \\
+ r4 :\avr@reg@get{00100}{\@tempa}:= '\@tempa' &
+ r5 :\avr@reg@get{00101}{\@tempa}:= '\@tempa' &
+ r6 :\avr@reg@get{00110}{\@tempa}:= '\@tempa' &
+ r7 :\avr@reg@get{00111}{\@tempa}:= '\@tempa' \\
+ r8 :\avr@reg@get{01000}{\@tempa}:= '\@tempa' &
+ r9 :\avr@reg@get{01001}{\@tempa}:= '\@tempa' &
+ r10:\avr@reg@get{01010}{\@tempa}:= '\@tempa' &
+ r11:\avr@reg@get{01011}{\@tempa}:= '\@tempa' \\
+ r12:\avr@reg@get{01100}{\@tempa}:= '\@tempa' &
+ r13:\avr@reg@get{01101}{\@tempa}:= '\@tempa' &
+ r14:\avr@reg@get{01110}{\@tempa}:= '\@tempa' &
+ r15:\avr@reg@get{01111}{\@tempa}:= '\@tempa' \\
+ r16:\avr@reg@get{10000}{\@tempa}:= '\@tempa' &
+ r17:\avr@reg@get{10001}{\@tempa}:= '\@tempa' &
+ r18:\avr@reg@get{10010}{\@tempa}:= '\@tempa' &
+ r19:\avr@reg@get{10011}{\@tempa}:= '\@tempa' \\
+ r20:\avr@reg@get{10100}{\@tempa}:= '\@tempa' &
+ r21:\avr@reg@get{10101}{\@tempa}:= '\@tempa' &
+ r22:\avr@reg@get{10110}{\@tempa}:= '\@tempa' &
+ r23:\avr@reg@get{10111}{\@tempa}:= '\@tempa' \\
+ r24:\avr@reg@get{11000}{\@tempa}:= '\@tempa' &
+ r25:\avr@reg@get{11001}{\@tempa}:= '\@tempa' &
+ r26:\avr@reg@get{11010}{\@tempa}:= '\@tempa' &
+ r27:\avr@reg@get{11011}{\@tempa}:= '\@tempa' \\
+ r28:\avr@reg@get{11100}{\@tempa}:= '\@tempa' &
+ r29:\avr@reg@get{11101}{\@tempa}:= '\@tempa' &
+ r30:\avr@reg@get{11110}{\@tempa}:= '\@tempa' &
+ r31:\avr@reg@get{11111}{\@tempa}:= '\@tempa' \\
+ \end{tabular}
+}
+
+\def\avr@dump{%
+ \avr@sreg@get{\@@X} \avr@debug{SREG::='\@@X' (ITHS VNZC)}
+ \def\avr@dump@reg##1##2{%
+ \avr@reg@get{\csuse{avr@##1}}{\@@X}%
+ \avr@bin@tocount{\@@X}{\avr@count@tmpa}%
+ \edef##2{##1=\the\avr@count@tmpa}%
+ }%
+ \def\avr@dump@row##1##2##3##4{%
+ \avr@dump@reg{##1}{\@@A}%
+ \avr@dump@reg{##2}{\@@B}%
+ \avr@dump@reg{##3}{\@@C}%
+ \avr@dump@reg{##4}{\@@D}%
+ \avr@debug{(\@@A) (\@@B) (\@@C) (\@@D)}%
+ }%
+ \avr@dump@row{r0}{r1}{r2}{r3}%
+ \avr@dump@row{r4}{r5}{r6}{r7}%
+ \avr@dump@row{r8}{r9}{r10}{r11}%
+ \avr@dump@row{r12}{r13}{r14}{r15}%
+ \avr@dump@row{r16}{r17}{r18}{r19}%
+ \avr@dump@row{r20}{r21}{r22}{r23}%
+ \avr@dump@row{r24}{r25}{r26}{r27}%
+ \avr@dump@row{r28}{r29}{r30}{r31}%
+}
+
+
+%% Status Register && Flags
+\def\avr@flag@set#1#2{% Register Name, Value \in 0,1
+ \csxdef{avr@flag@#1}{#2}\relax%
+}
+
+\def\avr@flag@get#1#2{% Register Name, Target Macro
+ \edef#2{\csuse{avr@flag@#1}}%
+}
+
+\def\avr@flag@init{%
+ \avr@sreg@set{00000000}%
+}
+
+\def\avr@sreg@set#1{% Bitstring
+ \def\avr@sreg@helper##1##2##3##4##5##6##7##8\@nnil{%
+ \avr@flag@set{C}{##8} % Carry
+ \avr@flag@set{Z}{##7} % Zero
+ \avr@flag@set{N}{##6} % Negative
+ \avr@flag@set{V}{##5} % Two's complement overflow indicator
+ \avr@flag@set{S}{##4} % N \xor V, For Signed Tests
+ \avr@flag@set{H}{##3} % Half Carry Flag
+ \avr@flag@set{T}{##2} % Transfer bit
+ \avr@flag@set{I}{##1} % Global Interrupt Enable
+ }%
+ \edef\@tempa{#1}%
+ \expandafter \avr@sreg@helper \@tempa \@nnil%
+}
+
+\def\avr@sreg@get#1{% Target Macro
+ \edef#1{%
+ \csuse{avr@flag@I}%
+ \csuse{avr@flag@T}%
+ \csuse{avr@flag@H}%
+ \csuse{avr@flag@S}%
+ \csuse{avr@flag@V}%
+ \csuse{avr@flag@N}%
+ \csuse{avr@flag@Z}%
+ \csuse{avr@flag@C}%
+ }%
+}
+
+\def\avr@flags@update#1{%
+ % Negate Flag
+ \avr@bin@msb@get{#1}{\@@N}%
+ \avr@flag@set N \@@N%
+ % Zero Flag
+ \avr@bin@tocount{#1}{\avr@count@tmpa}%
+ \ifnum \avr@count@tmpa = 0%
+ \avr@flag@set Z 1%
+ \else%
+ \avr@flag@set Z 0%
+ \fi%
+ % Signed Flag
+ \avr@flag@get V \@@V%
+ \edef\@@tmp{\avr@bit@xor \@@N \@@V}%
+ \avr@flag@set S \@@tmp%
+}
+
+%% Registers
+\def\avr@reg@set#1#2{% Bitstring, Register Bitstring
+ \csxdef{avr@reg@#2}{#1}%
+}
+
+\def\avr@reg@get#1#2{% Register Bitstring, Target Macro
+ \edef#2{\csuse{avr@reg@#1}}%
+}
+
+\csdef{avr@X}{1101}
+\csdef{avr@Y}{1110}
+\csdef{avr@Z}{1111}
+
+\def\avr@regw@get#1#2{%
+ \avr@reg@get{#11}{\@@high}%
+ \avr@reg@get{#10}{\@@low}%
+ \edef#2{\@@high \@@low}%
+}
+
+\def\avr@regw@set#1#2{%
+ \edef\@@value{#1}%
+ \avr@bin@word@low{\@@value}{\@@low}%
+ \avr@bin@word@high{\@@value}{\@@high}%
+ \avr@reg@set{\@@high}{#21}%
+ \avr@reg@set{\@@low}{#20}%
+}
+
+\def\avr@reg@init{%
+ \avr@reg@set{\avr@zeroes}{00000}%
+ \avr@reg@set{\avr@zeroes}{00001}%
+ \avr@reg@set{\avr@zeroes}{00010}%
+ \avr@reg@set{\avr@zeroes}{00011}%
+ \avr@reg@set{\avr@zeroes}{00100}%
+ \avr@reg@set{\avr@zeroes}{00101}%
+ \avr@reg@set{\avr@zeroes}{00110}%
+ \avr@reg@set{\avr@zeroes}{00111}%
+ \avr@reg@set{\avr@zeroes}{01000}%
+ \avr@reg@set{\avr@zeroes}{01001}%
+ \avr@reg@set{\avr@zeroes}{01010}%
+ \avr@reg@set{\avr@zeroes}{01011}%
+ \avr@reg@set{\avr@zeroes}{01100}%
+ \avr@reg@set{\avr@zeroes}{01101}%
+ \avr@reg@set{\avr@zeroes}{01110}%
+ \avr@reg@set{\avr@zeroes}{01111}%
+ \avr@reg@set{\avr@zeroes}{10000}%
+ \avr@reg@set{\avr@zeroes}{10001}%
+ \avr@reg@set{\avr@zeroes}{10010}%
+ \avr@reg@set{\avr@zeroes}{10011}%
+ \avr@reg@set{\avr@zeroes}{10100}%
+ \avr@reg@set{\avr@zeroes}{10101}%
+ \avr@reg@set{\avr@zeroes}{10110}%
+ \avr@reg@set{\avr@zeroes}{10111}%
+ \avr@reg@set{\avr@zeroes}{11000}%
+ \avr@reg@set{\avr@zeroes}{11001}%
+ \avr@reg@set{\avr@zeroes}{11010}%
+ \avr@reg@set{\avr@zeroes}{11011}%
+ \avr@reg@set{\avr@zeroes}{11100}%
+ \avr@reg@set{\avr@zeroes}{11101}%
+ \avr@reg@set{\avr@zeroes}{11110}%
+ \avr@reg@set{\avr@zeroes}{11111}%
+}
+
+\csdef{avr@r0}{00000}
+\csdef{avr@r1}{00001}
+\csdef{avr@r2}{00010}
+\csdef{avr@r3}{00011}
+\csdef{avr@r4}{00100}
+\csdef{avr@r5}{00101}
+\csdef{avr@r6}{00110}
+\csdef{avr@r7}{00111}
+\csdef{avr@r8}{01000}
+\csdef{avr@r9}{01001}
+\csdef{avr@r10}{01010}
+\csdef{avr@r11}{01011}
+\csdef{avr@r12}{01100}
+\csdef{avr@r13}{01101}
+\csdef{avr@r14}{01110}
+\csdef{avr@r15}{01111}
+\csdef{avr@r16}{10000}
+\csdef{avr@r17}{10001}
+\csdef{avr@r18}{10010}
+\csdef{avr@r19}{10011}
+\csdef{avr@r20}{10100}
+\csdef{avr@r21}{10101}
+\csdef{avr@r22}{10110}
+\csdef{avr@r23}{10111}
+\csdef{avr@r24}{11000}
+\csdef{avr@r25}{11001}
+\csdef{avr@r26}{11010}
+\csdef{avr@r27}{11011}
+\csdef{avr@r28}{11100}
+\csdef{avr@r29}{11101}
+\csdef{avr@r30}{11110}
+\csdef{avr@r31}{11111}
+
+%% Code
+\newcount\avr@pc
+\def\avr@pc@init{%
+ \avr@pc=0%
+}
+
+\def\avr@pc@inc{% Increment by one
+ \advance \avr@pc by 1\relax%
+ \avr@count@overflow{\avr@pc}%
+}
+
+\def\avr@pc@add#1{% Increment by N
+ \advance \avr@pc by #1\relax%
+ \avr@count@overflow{\avr@pc}%
+}
+
+
+\def\avr@code@get#1{% Result Macro
+ \edef#1{\csuse{avr@code@\the\avr@pc}}%
+}
+
+\def\avr@code@load#1#2{% Result Macro
+ \edef#2{\csuse{avr@code@#1}}%
+}
+
+\def\avr@code@set#1#2{% OpString (16 Bit), Number
+ \csxdef{avr@code@#2}{#1}%
+}
+%% RAM
+\newcount\avr@stackptr
+\def\avr@stack@init{%
+ \avr@stackptr=0%
+}
+
+\def\avr@stack@SPL@get#1{%
+ \avr@count@tobin@w{\avr@stackptr}{\@@stack}%
+ \avr@bin@word@low{\@@stack}{#1}%
+}
+\def\avr@stack@SPH@get#1{%
+ \avr@count@tobin@w{\avr@stackptr}{\@@stack}%
+ \avr@bin@word@high{\@@stack}{#1}%
+}
+
+\def\avr@stack@SPL@set#1{%
+ \avr@count@tobin@w{\avr@stackptr}{\@@stack}%
+ \avr@bin@word@high{\@@stack}{\@@high}%
+ \avr@bin@tocount{\@@high #1}{\avr@stackptr}%
+ \avr@debug{ SP=\the\avr@stackptr}%
+}
+
+\def\avr@stack@SPH@set#1{%
+ \avr@count@tobin@w{\avr@stackptr}{\@@stack}%
+ \avr@bin@word@low{\@@stack}{\@@low}%
+ \avr@bin@tocount{#1\@@low}{\avr@stackptr}%
+ \avr@debug{ SP=\the\avr@stackptr}%
+}
+
+\def\avr@mem@init#1{%
+ \avr@count@tmpa = #1\relax
+ \def\avr@mem@init@helper{%
+ \ifnum \avr@count@tmpa > 0%
+ \csxdef{avr@mem@\the\avr@count@tmpa}{00000000}%
+ \advance \avr@count@tmpa by -1\relax%
+ \else%
+ \let \avr@mem@init@helper \relax%
+ \fi%
+ \avr@mem@init@helper%
+ }%
+ \avr@mem@init@helper%
+}
+
+\def\avr@mem@set#1#2{% Bitstring, Address (as number)
+ \ifnum #2 < 96 % 0x60
+ % FIXME
+ \avr@error{Not implement access to IO/Regs through memory}%
+ \fi%
+ \avr@debug{ MEM W *#2=#1}%
+ \csxdef{avr@mem@#2}{#1}%
+}
+
+
+\def\avr@mem@get#1#2{% Address (as number), Target Macro
+ \ifnum #1 < 96 % 0x60
+ % FIXME
+ \avr@error{Not implement access to IO/Regs through memory}%
+ \fi%
+ \ifcsdef{avr@mem@#1}{%
+ \edef#2{\csuse{avr@mem@#1}}%
+ }{%
+ \edef#2{00000000}%
+ }%
+ \avr@debug{ MEM R *#1==#2}%
+}
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.numbers.tex b/Master/texmf-dist/tex/latex/avremu/avr.numbers.tex
new file mode 100644
index 00000000000..faa5da267d3
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.numbers.tex
@@ -0,0 +1,661 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+
+\def\avr@bindec@addmap#1#2{%
+ \csdef{avr@bin@#1}{#2}%
+ \csdef{avr@dec@#2}{#1}%
+}
+
+\avr@bindec@addmap{0}{00000000}
+\avr@bindec@addmap{1}{00000001}
+\avr@bindec@addmap{2}{00000010}
+\avr@bindec@addmap{3}{00000011}
+\avr@bindec@addmap{4}{00000100}
+\avr@bindec@addmap{5}{00000101}
+\avr@bindec@addmap{6}{00000110}
+\avr@bindec@addmap{7}{00000111}
+\avr@bindec@addmap{8}{00001000}
+\avr@bindec@addmap{9}{00001001}
+\avr@bindec@addmap{10}{00001010}
+\avr@bindec@addmap{11}{00001011}
+\avr@bindec@addmap{12}{00001100}
+\avr@bindec@addmap{13}{00001101}
+\avr@bindec@addmap{14}{00001110}
+\avr@bindec@addmap{15}{00001111}
+\avr@bindec@addmap{16}{00010000}
+\avr@bindec@addmap{17}{00010001}
+\avr@bindec@addmap{18}{00010010}
+\avr@bindec@addmap{19}{00010011}
+\avr@bindec@addmap{20}{00010100}
+\avr@bindec@addmap{21}{00010101}
+\avr@bindec@addmap{22}{00010110}
+\avr@bindec@addmap{23}{00010111}
+\avr@bindec@addmap{24}{00011000}
+\avr@bindec@addmap{25}{00011001}
+\avr@bindec@addmap{26}{00011010}
+\avr@bindec@addmap{27}{00011011}
+\avr@bindec@addmap{28}{00011100}
+\avr@bindec@addmap{29}{00011101}
+\avr@bindec@addmap{30}{00011110}
+\avr@bindec@addmap{31}{00011111}
+\avr@bindec@addmap{32}{00100000}
+\avr@bindec@addmap{33}{00100001}
+\avr@bindec@addmap{34}{00100010}
+\avr@bindec@addmap{35}{00100011}
+\avr@bindec@addmap{36}{00100100}
+\avr@bindec@addmap{37}{00100101}
+\avr@bindec@addmap{38}{00100110}
+\avr@bindec@addmap{39}{00100111}
+\avr@bindec@addmap{40}{00101000}
+\avr@bindec@addmap{41}{00101001}
+\avr@bindec@addmap{42}{00101010}
+\avr@bindec@addmap{43}{00101011}
+\avr@bindec@addmap{44}{00101100}
+\avr@bindec@addmap{45}{00101101}
+\avr@bindec@addmap{46}{00101110}
+\avr@bindec@addmap{47}{00101111}
+\avr@bindec@addmap{48}{00110000}
+\avr@bindec@addmap{49}{00110001}
+\avr@bindec@addmap{50}{00110010}
+\avr@bindec@addmap{51}{00110011}
+\avr@bindec@addmap{52}{00110100}
+\avr@bindec@addmap{53}{00110101}
+\avr@bindec@addmap{54}{00110110}
+\avr@bindec@addmap{55}{00110111}
+\avr@bindec@addmap{56}{00111000}
+\avr@bindec@addmap{57}{00111001}
+\avr@bindec@addmap{58}{00111010}
+\avr@bindec@addmap{59}{00111011}
+\avr@bindec@addmap{60}{00111100}
+\avr@bindec@addmap{61}{00111101}
+\avr@bindec@addmap{62}{00111110}
+\avr@bindec@addmap{63}{00111111}
+\avr@bindec@addmap{64}{01000000}
+\avr@bindec@addmap{65}{01000001}
+\avr@bindec@addmap{66}{01000010}
+\avr@bindec@addmap{67}{01000011}
+\avr@bindec@addmap{68}{01000100}
+\avr@bindec@addmap{69}{01000101}
+\avr@bindec@addmap{70}{01000110}
+\avr@bindec@addmap{71}{01000111}
+\avr@bindec@addmap{72}{01001000}
+\avr@bindec@addmap{73}{01001001}
+\avr@bindec@addmap{74}{01001010}
+\avr@bindec@addmap{75}{01001011}
+\avr@bindec@addmap{76}{01001100}
+\avr@bindec@addmap{77}{01001101}
+\avr@bindec@addmap{78}{01001110}
+\avr@bindec@addmap{79}{01001111}
+\avr@bindec@addmap{80}{01010000}
+\avr@bindec@addmap{81}{01010001}
+\avr@bindec@addmap{82}{01010010}
+\avr@bindec@addmap{83}{01010011}
+\avr@bindec@addmap{84}{01010100}
+\avr@bindec@addmap{85}{01010101}
+\avr@bindec@addmap{86}{01010110}
+\avr@bindec@addmap{87}{01010111}
+\avr@bindec@addmap{88}{01011000}
+\avr@bindec@addmap{89}{01011001}
+\avr@bindec@addmap{90}{01011010}
+\avr@bindec@addmap{91}{01011011}
+\avr@bindec@addmap{92}{01011100}
+\avr@bindec@addmap{93}{01011101}
+\avr@bindec@addmap{94}{01011110}
+\avr@bindec@addmap{95}{01011111}
+\avr@bindec@addmap{96}{01100000}
+\avr@bindec@addmap{97}{01100001}
+\avr@bindec@addmap{98}{01100010}
+\avr@bindec@addmap{99}{01100011}
+\avr@bindec@addmap{100}{01100100}
+\avr@bindec@addmap{101}{01100101}
+\avr@bindec@addmap{102}{01100110}
+\avr@bindec@addmap{103}{01100111}
+\avr@bindec@addmap{104}{01101000}
+\avr@bindec@addmap{105}{01101001}
+\avr@bindec@addmap{106}{01101010}
+\avr@bindec@addmap{107}{01101011}
+\avr@bindec@addmap{108}{01101100}
+\avr@bindec@addmap{109}{01101101}
+\avr@bindec@addmap{110}{01101110}
+\avr@bindec@addmap{111}{01101111}
+\avr@bindec@addmap{112}{01110000}
+\avr@bindec@addmap{113}{01110001}
+\avr@bindec@addmap{114}{01110010}
+\avr@bindec@addmap{115}{01110011}
+\avr@bindec@addmap{116}{01110100}
+\avr@bindec@addmap{117}{01110101}
+\avr@bindec@addmap{118}{01110110}
+\avr@bindec@addmap{119}{01110111}
+\avr@bindec@addmap{120}{01111000}
+\avr@bindec@addmap{121}{01111001}
+\avr@bindec@addmap{122}{01111010}
+\avr@bindec@addmap{123}{01111011}
+\avr@bindec@addmap{124}{01111100}
+\avr@bindec@addmap{125}{01111101}
+\avr@bindec@addmap{126}{01111110}
+\avr@bindec@addmap{127}{01111111}
+\avr@bindec@addmap{128}{10000000}
+\avr@bindec@addmap{129}{10000001}
+\avr@bindec@addmap{130}{10000010}
+\avr@bindec@addmap{131}{10000011}
+\avr@bindec@addmap{132}{10000100}
+\avr@bindec@addmap{133}{10000101}
+\avr@bindec@addmap{134}{10000110}
+\avr@bindec@addmap{135}{10000111}
+\avr@bindec@addmap{136}{10001000}
+\avr@bindec@addmap{137}{10001001}
+\avr@bindec@addmap{138}{10001010}
+\avr@bindec@addmap{139}{10001011}
+\avr@bindec@addmap{140}{10001100}
+\avr@bindec@addmap{141}{10001101}
+\avr@bindec@addmap{142}{10001110}
+\avr@bindec@addmap{143}{10001111}
+\avr@bindec@addmap{144}{10010000}
+\avr@bindec@addmap{145}{10010001}
+\avr@bindec@addmap{146}{10010010}
+\avr@bindec@addmap{147}{10010011}
+\avr@bindec@addmap{148}{10010100}
+\avr@bindec@addmap{149}{10010101}
+\avr@bindec@addmap{150}{10010110}
+\avr@bindec@addmap{151}{10010111}
+\avr@bindec@addmap{152}{10011000}
+\avr@bindec@addmap{153}{10011001}
+\avr@bindec@addmap{154}{10011010}
+\avr@bindec@addmap{155}{10011011}
+\avr@bindec@addmap{156}{10011100}
+\avr@bindec@addmap{157}{10011101}
+\avr@bindec@addmap{158}{10011110}
+\avr@bindec@addmap{159}{10011111}
+\avr@bindec@addmap{160}{10100000}
+\avr@bindec@addmap{161}{10100001}
+\avr@bindec@addmap{162}{10100010}
+\avr@bindec@addmap{163}{10100011}
+\avr@bindec@addmap{164}{10100100}
+\avr@bindec@addmap{165}{10100101}
+\avr@bindec@addmap{166}{10100110}
+\avr@bindec@addmap{167}{10100111}
+\avr@bindec@addmap{168}{10101000}
+\avr@bindec@addmap{169}{10101001}
+\avr@bindec@addmap{170}{10101010}
+\avr@bindec@addmap{171}{10101011}
+\avr@bindec@addmap{172}{10101100}
+\avr@bindec@addmap{173}{10101101}
+\avr@bindec@addmap{174}{10101110}
+\avr@bindec@addmap{175}{10101111}
+\avr@bindec@addmap{176}{10110000}
+\avr@bindec@addmap{177}{10110001}
+\avr@bindec@addmap{178}{10110010}
+\avr@bindec@addmap{179}{10110011}
+\avr@bindec@addmap{180}{10110100}
+\avr@bindec@addmap{181}{10110101}
+\avr@bindec@addmap{182}{10110110}
+\avr@bindec@addmap{183}{10110111}
+\avr@bindec@addmap{184}{10111000}
+\avr@bindec@addmap{185}{10111001}
+\avr@bindec@addmap{186}{10111010}
+\avr@bindec@addmap{187}{10111011}
+\avr@bindec@addmap{188}{10111100}
+\avr@bindec@addmap{189}{10111101}
+\avr@bindec@addmap{190}{10111110}
+\avr@bindec@addmap{191}{10111111}
+\avr@bindec@addmap{192}{11000000}
+\avr@bindec@addmap{193}{11000001}
+\avr@bindec@addmap{194}{11000010}
+\avr@bindec@addmap{195}{11000011}
+\avr@bindec@addmap{196}{11000100}
+\avr@bindec@addmap{197}{11000101}
+\avr@bindec@addmap{198}{11000110}
+\avr@bindec@addmap{199}{11000111}
+\avr@bindec@addmap{200}{11001000}
+\avr@bindec@addmap{201}{11001001}
+\avr@bindec@addmap{202}{11001010}
+\avr@bindec@addmap{203}{11001011}
+\avr@bindec@addmap{204}{11001100}
+\avr@bindec@addmap{205}{11001101}
+\avr@bindec@addmap{206}{11001110}
+\avr@bindec@addmap{207}{11001111}
+\avr@bindec@addmap{208}{11010000}
+\avr@bindec@addmap{209}{11010001}
+\avr@bindec@addmap{210}{11010010}
+\avr@bindec@addmap{211}{11010011}
+\avr@bindec@addmap{212}{11010100}
+\avr@bindec@addmap{213}{11010101}
+\avr@bindec@addmap{214}{11010110}
+\avr@bindec@addmap{215}{11010111}
+\avr@bindec@addmap{216}{11011000}
+\avr@bindec@addmap{217}{11011001}
+\avr@bindec@addmap{218}{11011010}
+\avr@bindec@addmap{219}{11011011}
+\avr@bindec@addmap{220}{11011100}
+\avr@bindec@addmap{221}{11011101}
+\avr@bindec@addmap{222}{11011110}
+\avr@bindec@addmap{223}{11011111}
+\avr@bindec@addmap{224}{11100000}
+\avr@bindec@addmap{225}{11100001}
+\avr@bindec@addmap{226}{11100010}
+\avr@bindec@addmap{227}{11100011}
+\avr@bindec@addmap{228}{11100100}
+\avr@bindec@addmap{229}{11100101}
+\avr@bindec@addmap{230}{11100110}
+\avr@bindec@addmap{231}{11100111}
+\avr@bindec@addmap{232}{11101000}
+\avr@bindec@addmap{233}{11101001}
+\avr@bindec@addmap{234}{11101010}
+\avr@bindec@addmap{235}{11101011}
+\avr@bindec@addmap{236}{11101100}
+\avr@bindec@addmap{237}{11101101}
+\avr@bindec@addmap{238}{11101110}
+\avr@bindec@addmap{239}{11101111}
+\avr@bindec@addmap{240}{11110000}
+\avr@bindec@addmap{241}{11110001}
+\avr@bindec@addmap{242}{11110010}
+\avr@bindec@addmap{243}{11110011}
+\avr@bindec@addmap{244}{11110100}
+\avr@bindec@addmap{245}{11110101}
+\avr@bindec@addmap{246}{11110110}
+\avr@bindec@addmap{247}{11110111}
+\avr@bindec@addmap{248}{11111000}
+\avr@bindec@addmap{249}{11111001}
+\avr@bindec@addmap{250}{11111010}
+\avr@bindec@addmap{251}{11111011}
+\avr@bindec@addmap{252}{11111100}
+\avr@bindec@addmap{253}{11111101}
+\avr@bindec@addmap{254}{11111110}
+\avr@bindec@addmap{255}{11111111}
+
+\newcount\avr@count@tmpa
+\newcount\avr@count@tmpb
+
+% \avr@count@tobin@b uint8_t count|integer, \result -> \result = bin(arg)
+\def\avr@count@tobin@b#1#2{%
+ \ifnum #1 > 255 %
+ \avr@error{#1 to large value (\the#1)}%
+ \fi%
+ \ifnum #1 < 0 %
+ \avr@error{#1 to small value (\the#1)}%
+ \fi%
+ \avr@count@tmpa=#1%
+ \ifcsdef{avr@bin@\the\avr@count@tmpa}{}{%
+ \avr@error{Incorrect Number: #1}%
+ }%
+ \edef#2{\csuse{avr@bin@\the\avr@count@tmpa}}%
+}
+
+% \avr@count@tobin@w uint16_t count|integer, \result -> \result = bin(arg)
+\def\avr@count@tobin@w#1#2{%
+ \ifnum #1 > 65535 %
+ \avr@error{#1 to large value}%
+ \fi%
+ \ifnum #1 < 0 %
+ \avr@error{#1 to small value}%
+ \fi%
+ \avr@count@tmpa=#1%
+ \avr@count@tmpb=\avr@count@tmpa%
+ \divide\avr@count@tmpa by 256\relax%
+ \multiply\avr@count@tmpa by 256\relax%
+ \advance\avr@count@tmpb by -\avr@count@tmpa\relax%
+ \divide\avr@count@tmpa by 256\relax%
+ \ifcsdef{avr@bin@\the\avr@count@tmpa}{}{%
+ \avr@error{Incorrect Number: #1}%
+ }%
+ \ifcsdef{avr@bin@\the\avr@count@tmpb}{}{%
+ \avr@error{Incorrect Number: #1}%
+ }%
+ \edef#2{\csuse{avr@bin@\the\avr@count@tmpa}\csuse{avr@bin@\the\avr@count@tmpb}}%
+}
+
+
+\def\avr@bin@tocount#1#2{% BitString Counter
+ \avr@count@tmpa=0%
+ \edef\@tempa{#1}%
+ \expandafter\avr@bin@tocount@helper\@tempa\@nnil%
+ #2=\avr@count@tmpa%
+}
+\def\avr@bin@tocount@helper#1#2#3#4#5#6#7#8#9\@nnil{%
+ \multiply\avr@count@tmpa by 256\relax%
+ \ifcsdef{avr@dec@#1#2#3#4#5#6#7#8}{}{%
+ \avr@error{Incorrect Number: '#1'}%
+ }%
+ \advance\avr@count@tmpa by \csuse{avr@dec@#1#2#3#4#5#6#7#8}%
+ \if&#9&\else%
+ \avr@bin@tocount@helper #9\@nnil%
+ \fi%
+}
+
+\csdef{avr@hex@0}{0000}
+\csdef{avr@hex@1}{0001}
+\csdef{avr@hex@2}{0010}
+\csdef{avr@hex@3}{0011}
+\csdef{avr@hex@4}{0100}
+\csdef{avr@hex@5}{0101}
+\csdef{avr@hex@6}{0110}
+\csdef{avr@hex@7}{0111}
+\csdef{avr@hex@8}{1000}
+\csdef{avr@hex@9}{1001}
+\csdef{avr@hex@A}{1010}
+\csdef{avr@hex@B}{1011}
+\csdef{avr@hex@C}{1100}
+\csdef{avr@hex@D}{1101}
+\csdef{avr@hex@E}{1110}
+\csdef{avr@hex@F}{1111}
+\csdef{avr@hex@a}{1010}
+\csdef{avr@hex@b}{1011}
+\csdef{avr@hex@c}{1100}
+\csdef{avr@hex@d}{1101}
+\csdef{avr@hex@e}{1110}
+\csdef{avr@hex@f}{1111}
+
+% Hexstring to Bitstring: hexstring, \result macro
+\def\avr@hex@tobin#1#2{%
+ \def\avr@hex@helper##1##2\@nnil{%
+ \xdef#2{#2\csuse{avr@hex@##1}}%
+ \ifx&##2&\else%
+ \avr@hex@helper ##2\@nnil%
+ \fi%
+ }%
+ \def#2{}%
+ \edef\@tempa{#1}\relax%
+ \expandafter \avr@hex@helper \@tempa \@nnil%
+}
+
+
+\def\avr@count@overflow#1{%
+ \def\avr@count@overflow@flag{0}%
+ \ifnum #1 < 0%
+ \advance #1 by 65536%
+ \def\avr@count@overflow@flag{1}%
+ \fi%
+ \ifnum #1 > 65535%
+ \advance #1 by -65536%
+ \def\avr@count@overflow@flag{1}%
+ \fi%
+}
+
+\def\avr@count@modulo@byte#1{%
+ \avr@count@tmpa=#1\relax%
+ \avr@count@tmpb=#1\relax%
+
+ \divide \avr@count@tmpa by 256\relax%
+ \multiply \avr@count@tmpa by 256\relax%
+ \advance \avr@count@tmpb by -\avr@count@tmpa\relax%
+ \ifnum \avr@count@tmpb < 0%
+ \advance\avr@count@tmpb by 256%
+ \fi%
+ #1 = \avr@count@tmpb\relax%
+}
+
+\def\avr@ascii@def#1#2{\csdef{avr@ascii@#1}{\detokenize{#2}}}
+\def\avr@ascii#1#2{\def#2{\csuse{avr@ascii@#1}}}
+
+\avr@ascii@def{0}{^0}
+\avr@ascii@def{1}{^1}
+\avr@ascii@def{2}{^2}
+\avr@ascii@def{3}{^3}
+\avr@ascii@def{4}{^4}
+\avr@ascii@def{5}{^5}
+\avr@ascii@def{6}{^6}
+\avr@ascii@def{7}{^7}
+\avr@ascii@def{8}{^8}
+\avr@ascii@def{9}{^9}
+\avr@ascii@def{10}{^10}
+\avr@ascii@def{11}{^11}
+\avr@ascii@def{12}{^12}
+\avr@ascii@def{13}{^13}
+\avr@ascii@def{14}{^14}
+\avr@ascii@def{15}{^15}
+\avr@ascii@def{16}{^16}
+\avr@ascii@def{17}{^17}
+\avr@ascii@def{18}{^18}
+\avr@ascii@def{19}{^19}
+\avr@ascii@def{20}{^20}
+\avr@ascii@def{21}{^21}
+\avr@ascii@def{22}{^22}
+\avr@ascii@def{23}{^23}
+\avr@ascii@def{24}{^24}
+\avr@ascii@def{25}{^25}
+\avr@ascii@def{26}{^26}
+\avr@ascii@def{27}{^27}
+\avr@ascii@def{28}{^28}
+\avr@ascii@def{29}{^29}
+\avr@ascii@def{30}{^30}
+\avr@ascii@def{31}{^31}
+\avr@ascii@def{32}{ }
+\avr@ascii@def{33}{!}
+\avr@ascii@def{34}{"}
+\avr@ascii@def{35}{\#}
+\avr@ascii@def{36}{\$}
+\avr@ascii@def{37}{\%}
+\avr@ascii@def{38}{\&}
+\avr@ascii@def{39}{'}
+\avr@ascii@def{40}{(}
+\avr@ascii@def{41}{)}
+\avr@ascii@def{42}{*}
+\avr@ascii@def{43}{+}
+\avr@ascii@def{44}{,}
+\avr@ascii@def{45}{-}
+\avr@ascii@def{46}{.}
+\avr@ascii@def{47}{/}
+\avr@ascii@def{48}{0}
+\avr@ascii@def{49}{1}
+\avr@ascii@def{50}{2}
+\avr@ascii@def{51}{3}
+\avr@ascii@def{52}{4}
+\avr@ascii@def{53}{5}
+\avr@ascii@def{54}{6}
+\avr@ascii@def{55}{7}
+\avr@ascii@def{56}{8}
+\avr@ascii@def{57}{9}
+\avr@ascii@def{58}{:}
+\avr@ascii@def{59}{;}
+\avr@ascii@def{60}{<}
+\avr@ascii@def{61}{=}
+\avr@ascii@def{62}{>}
+\avr@ascii@def{63}{?}
+\avr@ascii@def{64}{@}
+\avr@ascii@def{65}{A}
+\avr@ascii@def{66}{B}
+\avr@ascii@def{67}{C}
+\avr@ascii@def{68}{D}
+\avr@ascii@def{69}{E}
+\avr@ascii@def{70}{F}
+\avr@ascii@def{71}{G}
+\avr@ascii@def{72}{H}
+\avr@ascii@def{73}{I}
+\avr@ascii@def{74}{J}
+\avr@ascii@def{75}{K}
+\avr@ascii@def{76}{L}
+\avr@ascii@def{77}{M}
+\avr@ascii@def{78}{N}
+\avr@ascii@def{79}{O}
+\avr@ascii@def{80}{P}
+\avr@ascii@def{81}{Q}
+\avr@ascii@def{82}{R}
+\avr@ascii@def{83}{S}
+\avr@ascii@def{84}{T}
+\avr@ascii@def{85}{U}
+\avr@ascii@def{86}{V}
+\avr@ascii@def{87}{W}
+\avr@ascii@def{88}{X}
+\avr@ascii@def{89}{Y}
+\avr@ascii@def{90}{Z}
+\avr@ascii@def{91}{[}
+\avr@ascii@def{92}{\char92}
+\avr@ascii@def{93}{]}
+\avr@ascii@def{94}{^}
+\avr@ascii@def{95}{_}
+\avr@ascii@def{96}{`}
+\avr@ascii@def{97}{a}
+\avr@ascii@def{98}{b}
+\avr@ascii@def{99}{c}
+\avr@ascii@def{100}{d}
+\avr@ascii@def{101}{e}
+\avr@ascii@def{102}{f}
+\avr@ascii@def{103}{g}
+\avr@ascii@def{104}{h}
+\avr@ascii@def{105}{i}
+\avr@ascii@def{106}{j}
+\avr@ascii@def{107}{k}
+\avr@ascii@def{108}{l}
+\avr@ascii@def{109}{m}
+\avr@ascii@def{110}{n}
+\avr@ascii@def{111}{o}
+\avr@ascii@def{112}{p}
+\avr@ascii@def{113}{q}
+\avr@ascii@def{114}{r}
+\avr@ascii@def{115}{s}
+\avr@ascii@def{116}{t}
+\avr@ascii@def{117}{u}
+\avr@ascii@def{118}{v}
+\avr@ascii@def{119}{w}
+\avr@ascii@def{120}{x}
+\avr@ascii@def{121}{y}
+\avr@ascii@def{122}{z}
+\avr@ascii@def{123}{{}
+\avr@ascii@def{124}{|}
+\avr@ascii@def{125}{}}
+\avr@ascii@def{126}{~}
+\avr@ascii@def{127}{^?}
+\avr@ascii@def{128}{^128}
+\avr@ascii@def{129}{^129}
+\avr@ascii@def{130}{^130}
+\avr@ascii@def{131}{^131}
+\avr@ascii@def{132}{^131}
+\avr@ascii@def{133}{^133}
+\avr@ascii@def{134}{^134}
+\avr@ascii@def{135}{^135}
+\avr@ascii@def{136}{^136}
+\avr@ascii@def{137}{^137}
+\avr@ascii@def{138}{^138}
+\avr@ascii@def{139}{^139}
+\avr@ascii@def{140}{^140}
+\avr@ascii@def{141}{^141}
+\avr@ascii@def{142}{^142}
+\avr@ascii@def{143}{^143}
+\avr@ascii@def{144}{^144}
+\avr@ascii@def{145}{^145}
+\avr@ascii@def{146}{^146}
+\avr@ascii@def{147}{^147}
+\avr@ascii@def{148}{^148}
+\avr@ascii@def{149}{^149}
+\avr@ascii@def{150}{^150}
+\avr@ascii@def{151}{^151}
+\avr@ascii@def{152}{^152}
+\avr@ascii@def{153}{^153}
+\avr@ascii@def{154}{^154}
+\avr@ascii@def{155}{^155}
+\avr@ascii@def{156}{^156}
+\avr@ascii@def{157}{^157}
+\avr@ascii@def{158}{^158}
+\avr@ascii@def{159}{^159}
+\avr@ascii@def{160}{^160}
+\avr@ascii@def{161}{¡}
+\avr@ascii@def{162}{¢}
+\avr@ascii@def{163}{£}
+\avr@ascii@def{164}{¤}
+\avr@ascii@def{165}{¥}
+\avr@ascii@def{166}{¦}
+\avr@ascii@def{167}{§}
+\avr@ascii@def{168}{¨}
+\avr@ascii@def{169}{©}
+\avr@ascii@def{170}{ª}
+\avr@ascii@def{171}{«}
+\avr@ascii@def{172}{¬}
+\avr@ascii@def{173}{^173}
+\avr@ascii@def{174}{®}
+\avr@ascii@def{175}{¯}
+\avr@ascii@def{176}{°}
+\avr@ascii@def{177}{±}
+\avr@ascii@def{178}{²}
+\avr@ascii@def{179}{³}
+\avr@ascii@def{180}{´}
+\avr@ascii@def{181}{µ}
+\avr@ascii@def{182}{¶}
+\avr@ascii@def{183}{·}
+\avr@ascii@def{184}{¸}
+\avr@ascii@def{185}{¹}
+\avr@ascii@def{186}{º}
+\avr@ascii@def{187}{»}
+\avr@ascii@def{188}{¼}
+\avr@ascii@def{189}{½}
+\avr@ascii@def{190}{¾}
+\avr@ascii@def{191}{¿}
+\avr@ascii@def{192}{À}
+\avr@ascii@def{193}{Á}
+\avr@ascii@def{194}{Â}
+\avr@ascii@def{195}{Ã}
+\avr@ascii@def{196}{Ä}
+\avr@ascii@def{197}{Å}
+\avr@ascii@def{198}{Æ}
+\avr@ascii@def{199}{Ç}
+\avr@ascii@def{200}{È}
+\avr@ascii@def{201}{É}
+\avr@ascii@def{202}{Ê}
+\avr@ascii@def{203}{Ë}
+\avr@ascii@def{204}{Ì}
+\avr@ascii@def{205}{Í}
+\avr@ascii@def{206}{Î}
+\avr@ascii@def{207}{Ï}
+\avr@ascii@def{208}{Ð}
+\avr@ascii@def{209}{Ñ}
+\avr@ascii@def{210}{Ò}
+\avr@ascii@def{211}{Ó}
+\avr@ascii@def{212}{Ô}
+\avr@ascii@def{213}{Õ}
+\avr@ascii@def{214}{Ö}
+\avr@ascii@def{215}{×}
+\avr@ascii@def{216}{Ø}
+\avr@ascii@def{217}{Ù}
+\avr@ascii@def{218}{Ú}
+\avr@ascii@def{219}{Û}
+\avr@ascii@def{220}{Ü}
+\avr@ascii@def{221}{Ý}
+\avr@ascii@def{222}{Þ}
+\avr@ascii@def{223}{ß}
+\avr@ascii@def{224}{à}
+\avr@ascii@def{225}{á}
+\avr@ascii@def{226}{â}
+\avr@ascii@def{227}{ã}
+\avr@ascii@def{228}{ä}
+\avr@ascii@def{229}{å}
+\avr@ascii@def{230}{æ}
+\avr@ascii@def{231}{ç}
+\avr@ascii@def{232}{è}
+\avr@ascii@def{233}{é}
+\avr@ascii@def{234}{ê}
+\avr@ascii@def{235}{ë}
+\avr@ascii@def{236}{ì}
+\avr@ascii@def{237}{í}
+\avr@ascii@def{238}{î}
+\avr@ascii@def{239}{ï}
+\avr@ascii@def{240}{ð}
+\avr@ascii@def{241}{ñ}
+\avr@ascii@def{242}{ò}
+\avr@ascii@def{243}{ó}
+\avr@ascii@def{244}{ô}
+\avr@ascii@def{245}{õ}
+\avr@ascii@def{246}{ö}
+\avr@ascii@def{247}{÷}
+\avr@ascii@def{248}{ø}
+\avr@ascii@def{249}{ù}
+\avr@ascii@def{250}{ú}
+\avr@ascii@def{251}{û}
+\avr@ascii@def{252}{ü}
+\avr@ascii@def{253}{ý}
+\avr@ascii@def{254}{þ}
+\avr@ascii@def{255}{ÿ}
+
+
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: "avr.tex"
+%%% End:
diff --git a/Master/texmf-dist/tex/latex/avremu/avr.testsuite.tex b/Master/texmf-dist/tex/latex/avremu/avr.testsuite.tex
new file mode 100644
index 00000000000..d1e96f6422b
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avr.testsuite.tex
@@ -0,0 +1,56 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+
+%% These Functions are used within the test-suite
+\def\avr@test@setup#1{%
+ \typeout{---- Test: #1 ----}%
+ \typeout{-> Initialize the AVR}%
+ \avr@init%
+}
+
+\def\avr@test@SREG#1{% Tests SREG for value
+ \avr@sreg@get{\@@SREG}%
+ \expandafter\ifstrequal\expandafter{\@@SREG}{#1}{%Success
+ }{%
+ \avr@error{SREG unequal: #1 != \@@SREG}%
+ }%
+}
+
+\def\avr@test@REG#1#2{% Tests SREG for value
+ \avr@reg@get{\csuse{avr@#1}}{\@@REG}%
+ \expandafter\ifstrequal\expandafter{\@@REG}{#2}{%Success
+ }{%
+ \avr@error{REG unequal: #2 != \@@REG}%
+ }%
+}
+
+\def\avr@test@MEM#1#2{% Tests MEM for value
+ \avr@mem@get{#1}{\@@MEM}%
+ \expandafter\ifstrequal\expandafter{\@@MEM}{#2}{%Success
+ }{%
+ \avr@error{MEM unequal: #2 != \@@MEM}%
+ }%
+}
+
+\def\avr@test@UDR#1{% Tests UDR output
+ \ifdefstring{\avr@UDR}{#1}{%Success
+ }{%
+ \avr@error{UDR unequal: #1 != \avr@UDR}%
+ }%
+ \def\avr@UDR{}%
+}
+
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: "avr.tex"
+%%% End:
diff --git a/Master/texmf-dist/tex/latex/avremu/avremu.sty b/Master/texmf-dist/tex/latex/avremu/avremu.sty
new file mode 100644
index 00000000000..31c80b4632f
--- /dev/null
+++ b/Master/texmf-dist/tex/latex/avremu/avremu.sty
@@ -0,0 +1,54 @@
+%% Copyright (C) 2014 Christian Dietrich <stettberger@dokucode.de>
+%% -------------------------------------------------------
+%%
+%% This package may be distributed and/or modified under the conditions
+%% of the LaTeX Project Public License, either version 1.3c of this
+%% license or (at your option) any later version. The latest version of
+%% this license is in
+%%
+%% http://www.latex-project.org/lppl.txt
+%%
+%% and version 1.3c or later is part of all distributions of LaTeX
+%% version 2008/05/04 or later.
+
+\NeedsTeXFormat{LaTeX2e}[1999/12/01]
+\ProvidesPackage{avremu} [2014/10/09 v0.1 avremu]
+\RequirePackage{etoolbox}
+\RequirePackage{tabularx}
+\RequirePackage{kvoptions}
+
+\SetupKeyvalOptions{
+ family=avr,
+ prefix=avr@
+}
+\DeclareBoolOption{debug}
+\ProcessKeyvalOptions*
+
+\input{avr.numbers}
+\input{avr.binary}
+\input{avr.bitops}
+\input{avr.memory}
+\input{avr.instr}
+\input{avr.io}
+\input{avr.testsuite}
+
+\ifavr@debug
+ \relax
+\else
+ \def\avr@debug#1{}
+\fi
+
+\newcommand{\useavremulibrary}[1]{
+ \def\do##1{%
+ \IfFileExists{##1}{%
+ \csedef{avr@atcode}{\the\catcode`\@}%
+ \makeatletter%
+ \input{##1}\relax%
+ \catcode`\@=\csname avr@atcode\endcsname%
+ }{%
+ \errmessage{avremu: Cannot find library ##1}%
+ }%
+ }%
+ \edef\@tempa{#1}%
+ \expandafter\docsvlist\expandafter{\@tempa}%
+}
diff --git a/Master/tlpkg/bin/tlpkg-ctan-check b/Master/tlpkg/bin/tlpkg-ctan-check
index 17a086ef4a7..77e31aa83fa 100755
--- a/Master/tlpkg/bin/tlpkg-ctan-check
+++ b/Master/tlpkg/bin/tlpkg-ctan-check
@@ -48,7 +48,7 @@ my @TLP_working = qw(
asymptote-faq-zh-cn asymptote-by-example-zh-cn asymptote-manual-zh-cn
asypictureb attachfile
augie auncial-new aurical autopdf authoraftertitle authorindex
- auto-pst-pdf autoarea automata autonum avantgar
+ auto-pst-pdf autoarea automata autonum avantgar avremu
b1encoding babel
babel-albanian babel-bahasa babel-basque babel-breton
babel-bulgarian babel-catalan babel-croatian babel-czech
diff --git a/Master/tlpkg/tlpsrc/avremu.tlpsrc b/Master/tlpkg/tlpsrc/avremu.tlpsrc
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/Master/tlpkg/tlpsrc/avremu.tlpsrc
diff --git a/Master/tlpkg/tlpsrc/collection-latexextra.tlpsrc b/Master/tlpkg/tlpsrc/collection-latexextra.tlpsrc
index e5db8a06643..28b75dabd36 100644
--- a/Master/tlpkg/tlpsrc/collection-latexextra.tlpsrc
+++ b/Master/tlpkg/tlpsrc/collection-latexextra.tlpsrc
@@ -49,6 +49,7 @@ depend autopdf
depend authoraftertitle
depend authorindex
depend autonum
+depend avremu
depend background
depend bashful
depend bchart