circuitikz (20apr20)

git-svn-id: svn://tug.org/texlive/trunk@54800 c570f23f-e606-0410-a88d-b1316a301751

3 files changed, 433 insertions, 14 deletions

diff --git a/Master/texmf-dist/doc/latex/circuitikz/changelog.tex b/Master/texmf-dist/doc/latex/circuitikz/changelog.tex
index c1dac70eb8a..7d50e0e01ba 100644
--- a/Master/texmf-dist/doc/latex/circuitikz/changelog.tex
+++ b/Master/texmf-dist/doc/latex/circuitikz/changelog.tex
@@ -5,6 +5,33 @@ full list of changes.
 
 \begin{itemize}
 \item
+  Version 1.1.0 (2020-04-19)
+
+  Version bumped to 1.1 because the new logic ports are quite a big
+  addition: now there is a new style for logic ports, conforming to IEEE
+  recommendations.
+
+  Several minor additions all over the map too.
+
+  \begin{itemize}
+  \tightlist
+  \item
+    added IEEE standard logic ports suggested by user Jason-s on GitHub
+  \item
+    added configurability to european logic port ``not'' output symbol,
+    suggested by j-hap on GitHub
+  \item
+    added \texttt{inerter} component by user Tadashi on GitHub
+  \item
+    added variable outer base height for IGBT, suggested by user RA-EE
+    on GitHub
+  \item
+    added configurable ``+'' and ``-'' signs on american-style voltage
+    generators
+  \item
+    text on amplifiers can be positioned to the left or centered
+  \end{itemize}
+\item
   Version 1.0.2 (2020-03-22)
 
   \begin{itemize}
diff --git a/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.pdf b/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.pdf
index 28e478825c0..ae19c3cdc5b 100644
--- a/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.pdf
+++ b/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.pdf
diff --git a/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.tex b/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.tex
index dbd67b0d3c3..f5fd98ad7a1 100644
--- a/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.tex
+++ b/Master/texmf-dist/doc/latex/circuitikz/circuitikzmanual.tex
@@ -1749,6 +1749,29 @@ The size of the broken part of the DC current source is configurable by changing
 
 You can change the scale of the batteries by setting the key \texttt{batteries/scale}, for the controlled (dependent) sources with \texttt{csources/scale}, and for all the other independent sources and generators with \texttt{sources/scale}, to something different from the default \texttt{1.0}.
 
+The symbols drawn into the \texttt{american voltage source}\footnote{Since version \texttt{1.1.0}, thanks to the suggestions and discussion
+\href{https://tex.stackexchange.com/questions/538723/circuitikz-what-should-i-do-to-put-the-and-on-the-appropriate-places-like-t}{in this TeX.SX question}.} can be changed by using the \verb|\ctikzset|  keys \texttt{bipoles/vsourceam/inner plus} and \texttt{bipoles/vsourceam/inner minus} (by default they are \verb|$+$| and \verb|$-$| respectively, in the current font), and move them nearer of farther away by twiddling \texttt{bipoles/vsourceam/margin} (default \texttt{0.7}, less means nearer).
+
+Moreover, you can move the two symbols nearer of farther away by twiddling \texttt{bipoles/vsourceam/margin} (default \texttt{0.7}, less means nearer).
+
+You can do the same with the \texttt{american controlled voltage sources}, substituting \texttt{cvsourceam} to \texttt{vsourceam} (notice the initial ``\texttt{c}'').
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}[american]
+   \ctikzset{bipoles/vsourceam/inner plus={\tiny $+$}}
+   \ctikzset{bipoles/vsourceam/inner minus={\tiny $-$}}
+   \draw (0,0) to[V, l_=$V$] ++(0,3)
+   to[R=\SI{5}{\ohm}] ++(3,0)
+   to[V, invert,
+   bipoles/vsourceam/inner plus={\color{red}\tiny $\oplus$},
+   bipoles/vsourceam/inner minus={\color{blue}\tiny $\ominus$},
+   bipoles/vsourceam/margin=0.5]
+   ++(0,-3) to[short, -*] (0,0) node[ground]{};
+\end{circuitikz}
+\end{LTXexample}
+
+
+
 \subsection{Instruments}
 \begin{groupdesc}
     \circuitdescbip*{ammeter}{Ammeter}{}
@@ -1954,6 +1977,7 @@ Or, if you want a more physical structure for the measurement setup:
 \subsection{Mechanical Analogy}
 \begin{groupdesc}
     \circuitdescbip*{damper}{Mechanical Damping}{}
+    \circuitdescbip*{inerter}{Mechanical Inerter}{}
     \circuitdescbip{spring}{Mechanical Stiffness}{}
     \circuitdescbip*{viscoe}{Mechanical viscoelastic element\footnotemark}{}(left/135/0.2, right/45/0.2, center/-90/0.3)
     \footnotetext{Suggested by @Alex in \url{https://tex.stackexchange.com/q/484268/38080}}
@@ -2506,6 +2530,29 @@ You can change the size of the Schottky ``hook'' changing the parameter \texttt{
     \end{circuitikz}
 \end{LTXexample}
 
+\paragraph{IGBT outer base}
+
+Normally, in bipolar IGBTs the outer base is the same size (height) of the inner one, and of the same thickness (which will depend on the class thickness value). You can change this by setting (via \verb|\ctikzset`|) the keys \texttt{tripoles/igbt/outer base height} (default \texttt{0.4}, the same as \texttt{base height}), and \texttt{tripoles/igbt/outer base thickness} (default \texttt{1.0}), which will be relative to the class thickness.
+
+\begin{LTXexample}[varwidth=true, pos=t, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0)
+    -- ++(1,0) node[nigbt, anchor=B](B){} (B.nobase)
+    -- ++(1,0) node[pigbt, anchor=B](B){} (B.nobase)
+    -- ++(1,0) node[Lnigbt, anchor=B](B){} (B.nobase)
+    -- ++(1,0) node[Lpigbt, anchor=B](B){} (B.nobase)
+    ;
+    \ctikzset{tripoles/igbt/outer base height=0.3}
+    \ctikzset{tripoles/igbt/outer base thickness=1.5}
+    \draw (6,0)
+    -- ++(1,0) node[nigbt, anchor=B](B){} (B.nobase)
+    -- ++(1,0) node[pigbt, anchor=B](B){} (B.nobase)
+    -- ++(1,0) node[Lnigbt, anchor=B](B){} (B.nobase)
+    -- ++(1,0) node[Lpigbt, anchor=B](B){} (B.nobase)
+    ;
+\end{circuitikz}
+\end{LTXexample}
+
 \paragraph{Base/Gate terminal.} The Base/Gate connection of all transistors can be disabled by the options \textit{nogate} or \textit{nobase}, respectively. The Base/Gate anchors are floating, but there is an additional anchor \texttt{nogate}/\texttt{nobase} , which can be used to point to the unconnected base:
 \begin{LTXexample}[varwidth=true]
 \begin{circuitikz}
@@ -3224,7 +3271,7 @@ Remember that the default \texttt{pgfkeys} directory is \texttt{/tikz} for nodes
     \circuitdesc*{inst amp}{plain instrumentation amplifier}{}( up/90/0.2, down/-90/0.2, refv up/45/0.2, refv down/-45/0.2 )
     \circuitdesc*{fd inst amp}{Fully differential instrumentation amplifier}{}
     \circuitdesc*{inst amp ra}{instrumentation amplifier with amplification resistance terminals}{}( ra+/180/0.1, ra-/180/0.1 )
-    \circuitdesc*{plain amp}{Plain amplifier, unmarked, two inputs}{}(in up/180/0.1, in down/180/0.1, up/90/0.2, out/0/0.2, bin up/145/0.2, bin down/-145/0.2, bout/45/0.3)
+    \circuitdesc*{plain amp}{Plain amplifier, unmarked, two inputs}{A$_1$}(in up/180/0.1, in down/180/0.1, up/90/0.2, out/-90/0.2, bin up/145/0.2, bin down/-145/0.2, bout/90/0.3)
     \circuitdesc*{plain mono amp}{Plain amplifier, one input}{}(in/180/0.2, out/0/0.2, up/90/0.2, center/-30/0.6, bin/145/0.1, bout/45/0.3)
     \circuitdesc*{buffer}{Buffer}{}(in/180/0.2, out/0/0.2, center/-30/0.6, bin/145/0.1, bout/45/0.3)
 \end{groupdesc}
@@ -3389,6 +3436,23 @@ If you want different symbols for input and output you can use a null symbol and
 \end{circuitikz}
 \end{LTXexample}
 
+The amplifier label (given as the text  of the node) is normally more or less centered in the shape (in the case of the triangular shape, it is shifted a bit to the left to \emph{seem} visually centered); since version \texttt{1.1.0} you can move it at the left side plus a fixed offset setting the key \texttt{component text} or the style with the same name to \texttt{left}; by default the key is \texttt{center}.
+You can change the offset with the key \texttt{left text distance} (default \texttt{0.3em}; you must use a length here).
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}[]
+    \draw (0,2.5) node[plain amp]{\texttt{741}};
+    \draw (3,2.5)
+        node[plain amp, component text=left]
+        {\texttt{741}};
+    \ctikzset{component text=left}
+    \draw (0,0) node[op amp]{\texttt{741}};
+    \ctikzset{left text distance=0.6em}
+    \draw (3,0) node[op amp]{\texttt{741}};
+\end{circuitikz}
+\end{LTXexample}
+
+These keys are also used for the positioning of the labels in the label positioning of IEEE logic gates (see~\ref{sec:ieeestdports}).
 \paragraph{European-style amplifier customization}
 
 Thanks to the suggestions from David Rouvel (\email{david.rouvel@iphc.cnrs.fr}) there are several possible customization for the European-style amplifiers.
@@ -3797,6 +3861,37 @@ Logic gates, with two or more input, are supported. Albeit in principle these co
     \circuitdesc*{american buffer port}{American \textsc{buffer} port}{}
     \circuitdesc*{american not port}{American \textsc{not} port}{}
 \end{groupdesc}
+
+There is no ``european''  version of the following symbols (but you can probably use the \texttt{schmitt symbol} of the IEEE standard ports.
+
+\begin{groupdesc}
+    \circuitdesc*{schmitt}{Non-Inverting Schmitt trigger}{}
+    \circuitdesc*{invschmitt}{Inverting Schmitt trigger}{}
+\end{groupdesc}
+
+\subsubsection{IEEE logic gates}\label{sec:ieeestdports}
+
+In addition to the legacy ports, since release 1.1.0, logic ports following the recommended geometry of distinctive-shape symbols in IEEE Std 91a-1991 Annex A (Recommended symbol proportions) are also available\footnote{Thanks to Jason for proposing it and digging out the info, see this \href{https://github.com/circuitikz/circuitikz/issues/383}{GitHub issue}.}.
+
+These ports are completely independent from the legacy set (either \texttt{american} or \texttt{european}); they are not eanbled by default because the relative size of the ports is very different from the legacy ones, and that will disrupt every schematic (especially if drawn with absolute coordinate). If you want to use them as default, you can use the command \verb|\ctikzset{logic ports=ieee}| and by default the shapes \texttt{and port}, \texttt{or port} and so on will be the IEEE standard ones.
+
+\begin{groupdesc}
+    \circuitdesc*{ieeestd and port}{IEEE standard ``and'' port}{}(in 1/180/0.2, in 2/180/0.2, out/0/0.2, bout/45/0.2)
+    \circuitdesc*{ieeestd nand port}{IEEE standard ``nand'' port}{}(in 1/180/0.2, out/0/0.2, bout/45/0.2)
+    \circuitdesc*{ieeestd or port}{IEEE standard ``or'' port}{}(in 1/180/0.2, bin 2/-155/0.2, out/0/0.2, bout/45/0.2)
+    \circuitdesc*{ieeestd nor port}{IEEE standard ``nor'' port}{}(left/180/0.2, center/-45/0.4, up/30/0.2,
+        down/-30/0.2)[not/45/0.3]
+    \circuitdesc*{ieeestd xor port}{IEEE standard ``xor'' port xor}{}(left/180/0.2, bin 1/145/0.3, ibin 1/45/0.3, right/45/0.2)
+    \circuitdesc*{ieeestd xnor port}{IEEE standard ``xnor'' port}{}(body left/70/0.4, body right/-70/0.3,
+        out/0/0.2, bout/45/0.2)
+    \circuitdesc*{ieeestd buffer port}{IEEE standard buffer port}{}(in 1/180/0.2, bin 1/-155/0.2, up/30/0.2, down/-30/0.2)
+    \circuitdesc*{ieeestd not port}{IEEE standard ``not'' port}{}(in/180/0.2, bin/-155/0.2, out/0/0.2, bout/45/0.2)
+    \circuitdesc*{ieeestd schmitt port}{Schmitt port matched to IEEE standard ports}{}(in/180/0.2, out/0/0.2, bout/45/0.2)
+    \circuitdesc*{ieeestd inv schmitt port}{Inverting Schmitt port matched to IEEE standard ports}{}
+    \circuitdesc*{notcirc}{Inverting dot for IEEE ports}{}(west/180/0.1, east/0/0.1)
+    \circuitdesc*{schmitt symbol}{Schmitt symbol to add to input pins if needed}{}(north west/145/0.1, south east/-45/0.1)
+\end{groupdesc}
+
 \subsubsection{European Logic gates}
 \begin{groupdesc}
     \circuitdesc*{european and port}{European \textsc{and} port}{}( in 1/180/0.2, in 2/180/0.2, out/0/0.2 )
@@ -3813,18 +3908,12 @@ Logic gates, with two or more input, are supported. Albeit in principle these co
 If (default behaviour) \texttt{americanports} option is active (or the style \texttt{[american ports]} is used), the shorthands \texttt{and port}, \texttt{or port}, \texttt{not port}, \texttt{nand port}, \texttt{not port}, \texttt{xor port}, and \texttt{xnor port} are equivalent to the american version of the respective logic port.
 
 If otherwise \texttt{europeanports} option is active (or the style \texttt{[european ports]} is used), the shorthands \texttt{and port}, \texttt{or port}, \texttt{not port}, \texttt{nand port}, \texttt{not port}, \texttt{xor port}, and \texttt{xnor port} are equivalent to the european version of the respective logic port.
-\end{framed}
-
-\subsubsection{Special components}
 
-There is no ``european''  version of these symbols.
+Finally, for version \texttt{1.1.0} and up, you can use the style \texttt{ieee ports} to set the shorthands to the set of \texttt{ieeestd} ports. (There is no global option for this).
+\end{framed}
 
-\begin{groupdesc}
-    \circuitdesc*{schmitt}{Non-Inverting Schmitt trigger}{}
-    \circuitdesc*{invschmitt}{Inverting Schmitt trigger}{}
-\end{groupdesc}
 
-\subsubsection{Logic port customization}
+\subsubsection{American port usage}
 
 Since version \texttt{1.0.0}, the default shape of the family of american ``or'' ports has changed to a more ``pointy'' one, for better distinguish them from the ``and''-type ports. You can still going back to the previous aspect with the key \texttt{american or shape} that can be set to \texttt{pointy} or \texttt{roundy}. The \texttt{legacy} style will enact the old, roundy style also.
 
@@ -3849,6 +3938,7 @@ Since version \texttt{1.0.0}, the default shape of the family of american ``or''
 \end{circuitikz}
 \end{LTXexample}
 
+\paragraph{American logic port customization}
 
 Logic port class is called \texttt{logic ports}, so you can scale them all with \texttt{logic ports/scale} (default \texttt{1.0}).
 
@@ -3921,7 +4011,7 @@ You can tweak the appearance of american ``or'' family (\texttt{or}, \texttt{nor
 \tikz \draw (0,0) node[xnor port] {};
 \end{LTXexample}
 
-\subsubsection{Logic port anchors}
+\paragraph{American logic port anchors}
 
 These are the anchors for logic ports:
 
@@ -3939,7 +4029,7 @@ These are the anchors for logic ports:
   south/-90, south east/45, east/45, north east/45}
     \path (A.\a) \coorda(\a)<\d>;
 
-\draw (9,0) node[european and port, ](A){} ;
+\draw (9,0) node[nand port, ](A){} ;
   \foreach \a/\d in {left/45, right/45, center/-90}
     \path (A.\a) \coorda(\a)<\d>;
 \end{circuitikz}
@@ -3960,7 +4050,7 @@ You have also ``border pin anchors'':
   \foreach \a/\d in {bin 1/-135, bin 2/-135, bin 3/-135, bout/-45}
     \path (A.\a) \coorda(\a)<\d>;
 
-\draw (9,0) node[european and port, ](A){} ;
+\draw (9,0) node[nand port, ](A){} ;
   \foreach \a/\d in {bin 1/-135, bin 2/-135, bout/-45}
     \path (A.\a) \coorda(\a)<\d>;
 \end{circuitikz}
@@ -4020,6 +4110,308 @@ In the case of \textsc{not}, there are only \texttt{in} and \texttt{out} (althou
 ;\end{circuitikz}
 \end{LTXexample}
 
+
+
+
+\subsubsection{IEEE logic gates usage.}
+
+\begingroup % for IEEE ports
+The rest of this section will assume you have issued the command \verb|\ctikzset{logic ports=ieee}|, so that the short form of the names is used.
+\ctikzset{logic ports=ieee}
+
+IEEE standard logic gates have a basic difference with the legacy ones: the proportions of their shapes does not change when you change the size, so you can't have a ``tall'' port or a ``squatty'' ones. The two-inputs gates, by default, have their default size designed so that they match the chips component (see~\ref{sec:chips}).
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[dipchip](C){IC} (C.pin 8)
+        node[or port, anchor=in 1,
+        color=red](A){IC2A};
+\end{circuitikz}
+\end{LTXexample}
+
+If you need, say, a 4-inputs port, the port will look like this:
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[dipchip](C){IC} (C.pin 8)
+        node[or port, anchor=in 1, number inputs=4,
+        color=red](A){IC2A};
+\end{circuitikz}
+\end{LTXexample}
+
+\dots and in this case it is clear that it does not match. With standard ports, there are two possibilities.
+The first one is to scale the port; if you set the port height so that it has the same size (see ``IEEE logic gates customization'' below for details)  as the number of ports, they will match again.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[dipchip](C){IC} (C.pin 8)
+        node[or port, anchor=in 1,
+        number inputs=4,
+        circuitikz/ieeestd ports/height=4,
+        color=red](A){IC2A};
+\end{circuitikz}
+\end{LTXexample}
+
+But then the size of the port is quite ``unusual''. The solution is technical literature is to use what we can call a ``rack'' for the inputs; basically, only a certain number of pins are kept on the port, and the other are put on an extended input line.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[dipchip](C){IC} (C.pin 8)
+        node[or port, anchor=in 1,
+        number inputs=4,
+        inner inputs=2,
+        color=red](A){IC2A};
+\end{circuitikz}
+\end{LTXexample}
+
+When using the \texttt{inner inputs} key, keep in mind the rule of thumbs:
+\begin{itemize}
+    \item the distance between the pins is matched with the chip ones when the \texttt{inner inputs} match the \texttt{/ieeestd ports/height} key;
+    \item when the number of pins in the rack is odd, the result is often quite ugly, so try to avoid it.
+\end{itemize}
+For example, look at the following example; given that we are asking an odd number of pins on the rack, some of the inputs are drawn on the port's border, resulting in a less-than-ideal diagram.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[dipchip](C){IC} (C.pin 8)
+        node[or port, anchor=in 1,
+        number inputs=5,
+        inner inputs=2,
+        color=red](A){IC2A};
+\end{circuitikz}
+\end{LTXexample}
+
+In this case, if you don't like the solution, the better approach is to let the gate grow a bit.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[dipchip](C){IC} (C.pin 8)
+        node[or port, anchor=in 1,
+        number inputs=5,
+        inner inputs=3,
+        circuitikz/ieeestd ports/height=3,
+        color=red](A){IC2A};
+\end{circuitikz}
+\end{LTXexample}
+
+The good thing about the rack mechanism is that you can have quite big ports without problems.
+
+\begin{LTXexample}[varwidth=true, pos=t, basicstyle=\small\ttfamily]
+\begin{circuitikz}[scale=0.75, transform shape]
+    \draw node[nor port, number inputs=32, inner inputs=2,
+               rotate=90](A){\rotatebox{-90}{IC1A}};
+\end{circuitikz}
+\end{LTXexample}
+
+You can use the additional elements (the \texttt{notcirc} and the \texttt{schmitt symbol} to obtain circuits like the following ones (well, a bit of a mix of conventions, but...):
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,0) node[and port](A){A} (A.out)
+    node[buffer port, anchor=in,
+        component text=left](B){B} (B.bin)
+    node[schmitt symbol, above left]{}
+    (A.bin 1) node[schmitt symbol, right]{};
+    \node [notcirc, left] at (A.bin 1) {};
+    \node [notcirc, above](C) at (B.up) {};
+    \draw (C.north) |- ++(-1,1) (B.down) --++(0,-1);
+\end{circuitikz}
+\end{LTXexample}
+
+Notice the key \texttt{component text=left} that moves the label near to the left border of the component. There is also a \verb|\ctikzset{component text=left}| if you prefer to have it as a default for all the IEEE ports.\footnote{There is a plan to extend this to other components, too.}
+
+
+\paragraph{Stacking and aligning IEEE standard gates.} The standard gates are designed so that they stacks up nicely when positioned using the external leads as anchors. Notice that the ports \textbf{do} have different sizes, but the leads lengths are designed to counter the differences.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw
+    (0,0) node[and port, anchor=in 1]{A1}
+    (0,-1.2) node[nand port, anchor=in 1]{A2}
+    (0,-2.4) node[or port, anchor=in 1]{A3}
+    (0,-3.6) node[xnor port, anchor=in 1]{A4};
+    \draw
+    (3,0) node[and port, anchor=in 1](A1){A1}
+    (3,-1.2) node[nand port, anchor=in 1]{A2}
+    (3,-2.4) node[or port, anchor=in 1]{A3}
+    (3,-3.6) node[xnor port, anchor=in 1](A4){A4};
+    \draw[red, dashed]([yshift=0.8cm]A1.body left)
+        -- ([yshift=-0.8cm]A4.body left);
+\end{circuitikz}
+\end{LTXexample}
+
+The length of the external leads can be changed by the user, but notice that if you use a too small value you can jeopardize that property.
+
+The single input ports (\texttt{not port}, \texttt{buffer port} and their Schmitt equivalent) are smaller that the six standard ports, so they are not kept aligned by default; the just have the same distance at the input side. For the not ports, the \texttt{left} position of the text results often in a better look (the centered text in the triangle seems to be much more at the right).
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \ctikzset{component text=left}
+    \draw (0,0) node[nand port, anchor=in 1]{A1}
+    (0,-1.8) node[buffer port, anchor=in 1]{A2}
+    (0,-3.2) node[not port, anchor=in 1]{A3};
+    \draw (3,0) node[nand port, anchor=in 1](A1){A1}
+    (3,-1.8) node[buffer port, anchor=in 1]{A2}
+    (3,-3.2) node[not port, anchor=in 1](A3){A3};
+    \draw[red, dashed]([yshift=0.8cm]A1.body left)
+        -- ([yshift=-0.8cm]A3.body left);
+\end{circuitikz}
+\end{LTXexample}
+
+\paragraph{IEEE standard ports customization}
+
+There are several parameters that can be used to customize the IEEE standard ports, although less than the ones in the legacy american ones --- the basic shape is set to follow the IEEE recommendation. The basic parameters are shown in the following table, and they can be set via \verb|\ctikzset{ieeestd ports/...}|
+
+\begin{tabular}{@{}>{\ttfamily}l >{\ttfamily} l >{\RaggedRight}p{0.6\textwidth}@{}}
+    \toprule
+    \multicolumn{1}{l}{\textbf{key}} &
+    \multicolumn{1}{l}{\textbf{default}} &
+    \multicolumn{1}{l}{\textbf{description}} \\
+    \midrule
+    baselen & 0.4 & the basic length for every dimension, as a fraction of the (scaled) resistor length  \\
+    height & 2 & the height of the port, in term of \texttt{baselen}. Pin distance is given by this parameter divided by the inner pins.\\
+    pin length & 0.7 & length of the external pin leads that are drawn with the port. This length is always calculated starting from the inner body of the shape.\\
+    not radius & 0.154 & radius of the ``not circle'' added to the negated-output ports. The default value is the IEEE recommended one. \\
+    xor bar distance & 0.192 & distance of the detached input shape in \texttt{xor} and \texttt{xnor} ports. The default value is the IEEE recommended one. \\
+    xor leads in & 1 & If set to \texttt{0}, there will be no leads drawn between the detached input line and the body in the \texttt{xor} and \texttt{xnor} ports. IEEE recommends \texttt{1} here. \\
+    schmitt symbol size & 0.3 & Size of the small Schmitt symbol to use near input leads. \\
+    \bottomrule
+\end{tabular}
+
+For example, using a \texttt{not radius} of \texttt{0.1} will give a ``not ball'' of the same size of a connecting pole, as it is in the legacy ports.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \draw (0,2) node[xnor port](P){}
+        (P.out) to[short, -o] ++(1,0);
+    \ctikzset{ieeestd ports/.cd, not radius=0.1,
+        xor bar distance=0.3, xor leads in=0}
+    \draw (0,0) node[xnor port](P){}
+        (P.out) to[short, -o] ++(1,0);
+\end{circuitikz}
+\end{LTXexample}
+
+In addition to the specific parameters, you can also apply to these ports the boolean style \texttt{no input leads}  as in legacy ones (this simply \emph{does not draw} the input leads, but the anchors stays where they should):
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+\draw (0,0) node[nand port,
+      number inputs=5, no input leads,](B){Pn};
+\draw (B.in 1) -- (B.bin 1) (B.in 5) -- (B.bin 5);
+\node[rotate=90] at (B.in 3) {\dots};
+\end{circuitikz}
+\end{LTXexample}
+
+Changing the leads length must be done with a bit of care, because if the length is shorter than the port left or right extrusions strange things can happen (yes, a 4-inputs xnor gates is not so well defined\dots but it's a nice example to show):
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}
+    \ctikzset{ieeestd ports/pin length=0.2}
+    \draw (0,0) node[xnor port,
+      number inputs=4, inner inputs=2](B){};
+\end{circuitikz}
+\end{LTXexample}
+
+\paragraph{IEEE standard ports anchors} Geographical anchors define the rectangular space that the port is using, included the leads if presents.
+
+\geocoord{ieeestd and port}
+\geocoord{ieeestd xnor port, number inputs=6, inner inputs=2,
+    circuitikz/ieeestd ports/height=1}
+
+Most of the anchors can be seen in the following diagram:
+
+\begin{circuitikz}[]
+    \draw (0,0) node[ieeestd and port, number inputs=4](A){};
+    \draw (5.8,0) node[ieeestd xnor port, number inputs=2,
+    circuitikz/ieeestd ports/.cd, baselen=0.6, pin length=1, xor bar distance=0.4](B){};
+    \draw (11,0) node[ieeestd or port, number inputs=6, inner inputs=2](C){};
+    %
+    \foreach \i in {1,2,3,4} {
+        \path (A.in \i) \showcoord(in \i)<180:0.3>;
+        \path (A.bin \i) \showcoordb(bin \i)<45:0.3>;
+    }
+    \path (A.out) \showcoord(out)<0:0.2>;
+    \path (A.bout) \showcoordb(bout)<-45:0.2>;
+    \path (A.left) \showcoord(left)<-45:0.4>;
+    \path (A.right) \showcoord(right)<45:0.4>;
+
+    \path (B.ibin 1) \showcoordb(ibin 1)<90:0.4>;
+    \path (B.ibin 2) \showcoordb(ibin 2)<-90:0.4>;
+    \path (B.bin 1) \showcoordb(bin 1)<-145:0.2>;
+    \path (B.out) \showcoord(out)<0:0.2>;
+    \path (B.bout) \showcoordb(bout)<-45:0.2>;
+    \path (B.left) \showcoord(left)<-145:0.4>;
+    \path (B.body left) \showcoord(body left)<145:0.6>;
+    \path (B.right) \showcoord(right)<45:0.4>;
+    \path (B.body right) \showcoord(body right)<90:0.5>;
+
+    \path (C.up) \showcoordb(up)<90:0.2>;
+    \path (C.down) \showcoordb(down)<-90:0.2>;
+    \foreach \i in {1,...,6} {
+        \path (C.in \i) \showcoord(in \i)<180:0.2>;
+    }
+\end{circuitikz}
+
+The inputs anchor are \texttt{in \emph{number}} (on the tip of the lead) and   \texttt{bin \emph{number}} (\textbf{b}order  \textbf{in}puts) on the component's border (useful if you draw the ports with \texttt{no inut leads}. Additionally, you have \texttt{ibin \emph{number}} (\textbf{i}nner \textbf{b}order \textbf{in}puts) for the \emph{x}-type ports. The anchor named \texttt{left} is where a central border input would be.
+
+In one-input ports (\texttt{not port}, the buffer, and Schmitt-type ports) you can use plain \texttt{in} or \texttt{in 1} indifferently.
+
+On the output, \texttt{out} is on the tip of the lead, and \texttt{bout} on the rightmost border (so, if there is a negation circle, it is on it); \texttt{right} is the same as \texttt{bout}.
+
+The main body of the port is marked with \texttt{body left} and \texttt{body right} anchors (as seen in the middle port in the diagram above); you have also an \texttt{up} and \texttt{down} anchors centered on the body (you can use them as enable signals or similar things).
+
+Finally, the internal \texttt{notcirc} node used for the output negation is accessible with the name \texttt{\emph{nodename}-not}, where \emph{nodename} is the name given to the logic port node.
+
+\endgroup % for IEEE ports ctikzset
+%%
+
+\subsubsection{European logic port usage}
+
+European logic port are the same class as american and IEEE-style ones, and they obey the same class modifier. Moreover, you can use the \texttt{no inputs pin} as in the other logic ports to suppress input pins.
+
+\paragraph{European logic port customization} Normally the European-style logic port with inverted output are marked with a small triangle; if you want you can change it with the key \texttt{tripoles/european not symbol}; its default is \texttt{triangle} but you can set it to \texttt{circle} like in the following example. As you can see, the circle size is the same as the circuit poles; if you prefer the size used in the IEEE standard ports, you can use set it to \texttt{ieee circle}.
+
+\begin{LTXexample}[varwidth=true, basicstyle=\small\ttfamily]
+\begin{circuitikz}[european]
+    \draw (0,3) node[nand port](A){}
+        (A.out) to[short, *-o] ++(0.5,0);
+    \ctikzset{tripoles/european not symbol=circle}
+    \draw (0,1.5) node[nand port](A){}
+        (A.out) to[short, *-o] ++(0.5,0);
+    \ctikzset{tripoles/european not symbol=ieee circle}
+    \draw (0,0) node[european nand port](A){}
+        (A.out) to[short, *-o] ++(0.5,0);
+\end{circuitikz}
+\end{LTXexample}
+
+\paragraph{European logic port anchors} The anchors are basically the same as in the american-style ports.
+
+\bigskip
+\begin{circuitikz} [american]
+\def\coorda(#1)<#2>{node[circle, red, draw, inner sep=1pt,pin={[red, overlay, inner sep=0.5pt, font=\small, pin distance=0.1cm, pin edge={red, overlay,}]#2:#1}](#1){}}
+
+\draw (0, 0) node[european and port, ](A){} ;
+  \foreach \a/\d in {left/45, right/45, center/-90}
+    \path (A.\a) \coorda(\a)<\d>;
+
+\draw (3,0) node[european and port, ](A){} ;
+  \foreach \a/\d in {bin 1/-135, bin 2/-135, bout/-45}
+    \path (A.\a) \coorda(\a)<\d>;
+
+\draw (6,0) node[european nand port, ](A){} ;
+  \foreach \a/\d in {bin 1/-135, bin 2/-135, bout/-45}
+    \path (A.\a) \coorda(\a)<\d>;
+
+\ctikzset{tripoles/european not symbol=circle}
+
+\draw (9,0) node[european nand port, ](A){} ;
+  \foreach \a/\d in {bin 1/-135, bin 2/-135, bout/-45}
+    \path (A.\a) \coorda(\a)<\d>;
+
+\end{circuitikz}
+\bigskip
+
+
 \subsection{Flip-flops}\label{sec:flipflops}
 
 Flip-flops (available since version \texttt{1.0.0}) are an hybrid between the logic ports and the chips. They have a class by themselves (\texttt{flipflops}) but the default parameters are set at the same values as the logic gates one.
@@ -4380,7 +4772,7 @@ You can use these shapes  to draw a lot of symbols that are unavailable; using a
 \end{circuitikz}
 \end{LTXexample}
 
-\subsection{Chips (integrated circuits)}
+\subsection{Chips (integrated circuits)}\label{sec:chips}
 
 \texttt{CircuiTikZ} supports two types of variable-pin chips: DIP (Dual-in-Line Package) and QFP (Quad-Flat Package).
 \begin{groupdesc}