diff options
author | Akira Kakuto <kakuto@fuk.kindai.ac.jp> | 2016-06-19 09:24:37 +0000 |
---|---|---|
committer | Akira Kakuto <kakuto@fuk.kindai.ac.jp> | 2016-06-19 09:24:37 +0000 |
commit | 4a3c2489f0b0fd32dacc4410ad8972fee2c528c1 (patch) | |
tree | 0555a8bdfaa96cfab1bb1ff72c9c102667bc902c /Build/source/libs/gmp/gmp-src/mpn | |
parent | 7143421053eed4407427bc9b4426e09d5f061814 (diff) |
gmp 6.1.1
git-svn-id: svn://tug.org/texlive/trunk@41496 c570f23f-e606-0410-a88d-b1316a301751
Diffstat (limited to 'Build/source/libs/gmp/gmp-src/mpn')
21 files changed, 83 insertions, 26 deletions
diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/aorslsh1_n.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/aorslsh1_n.asm index 1cbd4ba1af4..09b1662b708 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/aorslsh1_n.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/aorslsh1_n.asm @@ -163,5 +163,5 @@ L(rt1): mov r14, r12 REVCY(r12) L(rt0): RETVAL( r14) pop {r4-r10r11, r14} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/arm-defs.m4 b/Build/source/libs/gmp/gmp-src/mpn/arm/arm-defs.m4 index 6ca964a2459..371d8ea0f4d 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/arm-defs.m4 +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/arm-defs.m4 @@ -84,6 +84,9 @@ L(ptr'lea_num`): .word GSYM_PREFIX`'$2') ')dnl ') +define(`ret',`ifdef(`NOTHUMB',`mov pc, ',`bx')') + + define(`EPILOGUE_cpu', `lea_list SIZE(`$1',.-`$1')') diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/bdiv_dbm1c.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/bdiv_dbm1c.asm index ec3de50e8e2..48057559c9b 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/bdiv_dbm1c.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/bdiv_dbm1c.asm @@ -109,5 +109,5 @@ L(wd1): subs r5, r5, r8 str r5, [qp] sbc r0, r5, r12 pop {r4, r5, r6, r7, r8} - bx lr + ret lr EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/cnd_aors_n.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/cnd_aors_n.asm index e8eb60983af..f0399e29dab 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/cnd_aors_n.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/cnd_aors_n.asm @@ -130,5 +130,5 @@ L(top): ldm vp!, {r4,r5,r6,r7} L(end): RETVAL pop {r4-r11} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/com.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/com.asm index 42f8e3cbbe3..57db9af0f4d 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/com.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/com.asm @@ -71,5 +71,5 @@ L(top): ldmia up!, { r3, r8, r9, r12 } C load 4 limbs bne L(top) ldmfd sp!, { r7, r8, r9 } C restore regs from stack -L(rtn): bx lr +L(rtn): ret lr EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/copyd.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/copyd.asm index 3ea2035099d..938b1dcb013 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/copyd.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/copyd.asm @@ -80,5 +80,5 @@ L(top): subs n, n, #4 L(end): stmda rp, { r3,r4,r5,r12 } pop { r4-r5 } -L(rtn): bx lr +L(rtn): ret lr EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/copyi.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/copyi.asm index fa454702c14..0dc4e597111 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/copyi.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/copyi.asm @@ -75,5 +75,5 @@ L(top): subs n, n, #4 L(end): stm rp, { r3,r4,r5,r12 } pop { r4-r5 } -L(rtn): bx lr +L(rtn): ret lr EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/dive_1.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/dive_1.asm index ccceb3c3cc3..f9921e55ea1 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/dive_1.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/dive_1.asm @@ -112,7 +112,7 @@ L(end): sbc cy, r5, cy mul r9, r4, cy str r9, [rp] pop {r4-r9} - bx r14 + ret r14 L(unnorm): rsb tnc, cnt, #32 @@ -136,7 +136,7 @@ L(edu): sbc cy, r5, cy mul r9, r4, cy str r9, [rp] pop {r4-r9} - bx r14 + ret r14 EPILOGUE() RODATA diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/invert_limb.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/invert_limb.asm index 06ce1467ced..c969ed525c4 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/invert_limb.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/invert_limb.asm @@ -52,7 +52,7 @@ PROLOGUE(mpn_invert_limb) adds r1, r12, r0 adc r3, r3, r0 rsb r0, r3, r2 - bx lr + ret lr EPILOGUE() RODATA diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/logops_n.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/logops_n.asm index 5a61683fc2e..02ebbf3b9ce 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/logops_n.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/logops_n.asm @@ -135,5 +135,5 @@ L(mid): sub n, n, #4 pop { r4, r5, r6, r7 } C popping r8-r10 here strangely fails L(rtn): pop { r8, r9, r10 } - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/lshift.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/lshift.asm index 9f777eb4dd8..9e828423b39 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/lshift.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/lshift.asm @@ -84,5 +84,5 @@ L(end): orr r7, r7, r6, lsr tnc L(1): str r7, [rp, #-4] mov r0, r4, lsr tnc pop {r4, r6, r7, r8} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/lshiftc.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/lshiftc.asm index 5f3d6e3f5b7..1a2fa682ae6 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/lshiftc.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/lshiftc.asm @@ -91,5 +91,5 @@ L(1): mvn r6, #0 str r7, [rp, #-4] mov r0, r4, lsr tnc pop {r4, r6, r7, r8} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/mod_34lsub1.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/mod_34lsub1.asm index ba3c06d8db1..0dace666f6c 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/mod_34lsub1.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/mod_34lsub1.asm @@ -106,7 +106,7 @@ L(sum2): add r0, r0, r12, lsr #8 pop { r4, r5, r6, r7 } - bx lr + ret lr L(le2): cmn n, #1 bne L(1) @@ -117,5 +117,5 @@ L(1): ldr r2, [ap] bic r0, r2, #0xff000000 add r0, r0, r2, lsr #24 pop { r4, r5, r6, r7 } - bx lr + ret lr EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/mode1o.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/mode1o.asm index 5e0f78fc8f5..83a33aa650d 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/mode1o.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/mode1o.asm @@ -88,5 +88,5 @@ L(end): sbcs cy, r5, cy addcc r0, r0, #1 ldmfd sp!, {r4, r5} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/rsh1aors_n.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/rsh1aors_n.asm index 95c1f79ad9f..454cf5605d6 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/rsh1aors_n.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/rsh1aors_n.asm @@ -120,5 +120,5 @@ L(e1): RSTCY( r12, r1) str r4, [rp, #0] mov r0, r11 pop {r4-r11} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/rshift.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/rshift.asm index 84728d038a7..dbe9f93e70a 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/rshift.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/rshift.asm @@ -82,5 +82,5 @@ L(end): orr r7, r7, r6, lsl tnc L(1): str r7, [rp] mov r0, r4, lsl tnc pop {r4, r6, r7, r8} - bx r14 + ret r14 EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/sec_tabselect.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/sec_tabselect.asm index 8cf937a0917..c2b05497173 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/sec_tabselect.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/sec_tabselect.asm @@ -109,7 +109,7 @@ L(tp2): subs c, c, #1 bge L(tp2) stmia rp, {r8,r9} pop {r4-r11, r14} - bx lr + ret lr L(n2): cmp j, #-2 bne L(n1) @@ -127,5 +127,5 @@ L(tp1): subs c, c, #1 bge L(tp1) str r8, [rp] L(n1): pop {r4-r11, r14} - bx lr + ret lr EPILOGUE() diff --git a/Build/source/libs/gmp/gmp-src/mpn/arm/udiv.asm b/Build/source/libs/gmp/gmp-src/mpn/arm/udiv.asm index 8d441c74edd..bcf66ef0edb 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/arm/udiv.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/arm/udiv.asm @@ -61,7 +61,7 @@ L(oop): divstep(n1,n0,d) str n1, [rem_ptr] C store remainder adc r0, n0, n0 C quotient: add last carry from divstep - bx lr + ret lr L(_large_divisor): stmfd sp!, { r8, lr } diff --git a/Build/source/libs/gmp/gmp-src/mpn/generic/trialdiv.c b/Build/source/libs/gmp/gmp-src/mpn/generic/trialdiv.c index 09cecfd4108..6e83c996fed 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/generic/trialdiv.c +++ b/Build/source/libs/gmp/gmp-src/mpn/generic/trialdiv.c @@ -65,8 +65,8 @@ struct gmp_primes_dtab { struct gmp_primes_ptab { mp_limb_t ppp; /* primes, multiplied together */ mp_limb_t cps[7]; /* ppp values pre-computed for mpn_mod_1s_4p */ - unsigned int idx:24; /* index of first primes in dtab */ - unsigned int np :8; /* number of primes related to this entry */ + gmp_uint_least32_t idx:24; /* index of first primes in dtab */ + gmp_uint_least32_t np :8; /* number of primes related to this entry */ }; diff --git a/Build/source/libs/gmp/gmp-src/mpn/x86_64/coreibwl/mul_basecase.asm b/Build/source/libs/gmp/gmp-src/mpn/x86_64/coreibwl/mul_basecase.asm index 6365d10a185..50f3ce5877e 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/x86_64/coreibwl/mul_basecase.asm +++ b/Build/source/libs/gmp/gmp-src/mpn/x86_64/coreibwl/mul_basecase.asm @@ -94,6 +94,7 @@ IFDOS(` mov 56(%rsp), %r8d ') L(s11): mov %rax, (rp) mov %r9, 8(rp) + FUNC_EXIT() ret L(s2x): cmp $2, vn @@ -105,6 +106,7 @@ L(s21): add %r8, %r9 mov %rax, (rp) mov %r9, 8(rp) mov %r10, 16(rp) + FUNC_EXIT() ret L(s22): add %r8, %r9 C 1 @@ -121,6 +123,7 @@ L(s22): add %r8, %r9 C 1 mov %r9, 8(rp) mov %r10, 16(rp) mov %rdx, 24(rp) + FUNC_EXIT() ret ALIGN(16) @@ -294,6 +297,7 @@ L(done): pop %r12 pop %rbp pop %rbx + FUNC_EXIT() ret L(f2): diff --git a/Build/source/libs/gmp/gmp-src/mpn/x86_64/fat/fat.c b/Build/source/libs/gmp/gmp-src/mpn/x86_64/fat/fat.c index 30cd2104ff5..b8482fec743 100644 --- a/Build/source/libs/gmp/gmp-src/mpn/x86_64/fat/fat.c +++ b/Build/source/libs/gmp/gmp-src/mpn/x86_64/fat/fat.c @@ -206,6 +206,49 @@ int __gmpn_cpuvec_initialized = 0; asm routines only operate correctly up to their own defined threshold, not an arbitrary value. */ +static int +gmp_workaround_skylake_cpuid_bug () +{ + char feature_string[49]; + char processor_name_string[49]; + static const char *bad_cpus[] = {" G44", " G45", " G39" /* , "6600" */ }; + int i; + + /* Example strings: */ + /* "Intel(R) Pentium(R) CPU G4400 @ 3.30GHz" */ + /* "Intel(R) Core(TM) i5-6600K CPU @ 3.50GHz" */ + /* ^ ^ ^ */ + /* 0x80000002 0x80000003 0x80000004 */ + /* We match out just the 0x80000003 part here. */ + + /* In their infinitive wisdom, Intel decided to use one register order for + the vendor string, and another for the processor name string. We shuffle + things about here, rather than write a new variant of our assembly cpuid. + */ + + unsigned int eax, ebx, ecx, edx; + eax = __gmpn_cpuid (feature_string, 0x80000003); + ebx = ((unsigned int *)feature_string)[0]; + edx = ((unsigned int *)feature_string)[1]; + ecx = ((unsigned int *)feature_string)[2]; + + ((unsigned int *) (processor_name_string))[0] = eax; + ((unsigned int *) (processor_name_string))[1] = ebx; + ((unsigned int *) (processor_name_string))[2] = ecx; + ((unsigned int *) (processor_name_string))[3] = edx; + + processor_name_string[16] = 0; + + for (i = 0; i < sizeof (bad_cpus) / sizeof (char *); i++) + { + if (strstr (processor_name_string, bad_cpus[i]) != 0) + return 1; + } + return 0; +} + +enum {BMI2_BIT = 8}; + void __gmpn_cpuvec_init (void) { @@ -311,8 +354,9 @@ __gmpn_cpuvec_init (void) /* Some Haswells lack BMI2. Let them appear as Sandybridges for now. */ __gmpn_cpuid (dummy_string, 7); - if ((dummy_string[0 + 8 / 8] & (1 << (8 % 8))) != 0) - CPUVEC_SETUP_coreihwl; + if ((dummy_string[0 + BMI2_BIT / 8] & (1 << (BMI2_BIT % 8))) == 0) + break; + CPUVEC_SETUP_coreihwl; break; case 0x3d: /* Broadwell */ case 0x47: /* Broadwell */ @@ -321,17 +365,23 @@ __gmpn_cpuvec_init (void) CPUVEC_SETUP_core2; CPUVEC_SETUP_coreinhm; CPUVEC_SETUP_coreisbr; + if ((dummy_string[0 + BMI2_BIT / 8] & (1 << (BMI2_BIT % 8))) == 0) + break; CPUVEC_SETUP_coreihwl; CPUVEC_SETUP_coreibwl; break; case 0x4e: /* Skylake client */ case 0x55: /* Skylake server */ case 0x5e: /* Skylake */ - case 0x8e: /* Cabylake */ - case 0x9e: /* Cabylake */ + case 0x8e: /* Kabylake */ + case 0x9e: /* Kabylake */ CPUVEC_SETUP_core2; CPUVEC_SETUP_coreinhm; CPUVEC_SETUP_coreisbr; + if ((dummy_string[0 + BMI2_BIT / 8] & (1 << (BMI2_BIT % 8))) == 0) + break; + if (gmp_workaround_skylake_cpuid_bug ()) + break; CPUVEC_SETUP_coreihwl; CPUVEC_SETUP_coreibwl; CPUVEC_SETUP_skylake; |