From 8626a9c3cb5dc8d02d779d5b5b1e3933d5626f43 Mon Sep 17 00:00:00 2001 From: Norbert Preining Date: Sat, 2 May 2020 03:03:34 +0000 Subject: CTAN sync 202005020303 --- graphics/circuit_macros/examples/ics.m4 | 189 +++++++++++++++++++++++++++++--- 1 file changed, 174 insertions(+), 15 deletions(-) (limited to 'graphics/circuit_macros/examples/ics.m4') diff --git a/graphics/circuit_macros/examples/ics.m4 b/graphics/circuit_macros/examples/ics.m4 index 023b0d2a56..15e0f05bb8 100644 --- a/graphics/circuit_macros/examples/ics.m4 +++ b/graphics/circuit_macros/examples/ics.m4 @@ -1,26 +1,26 @@ divert(-1) - Macros defining some integrated circuits + Macros defining some integrated circuits and connectors -define(`lg_pinsep',3*L_unit) logic pin separation in logic units -define(`lg_chipwd',18*L_unit) default chip width - - `Chip outline sizes' -define(`chip_gen',` box invis wid lg_chipwd ht lg_pinsep*eval(`$1'/2+1) - arcd(last box.n, lg_pinsep/2, 180, 360) - { line to last box.ne chop -linewid bp__/2 } - { line from last arc.start to last box.nw chop -linewid bp__/2 } - line from last box.nw to last box.sw then to last box.se then to last box.ne - ') + `DIP_chip_outline( pin count, wid )' +define(`DIP_chip_outline', + `[ define(`m4chgw',`ifelse(`$2',,(18*L_unit),`$2')')dnl + Chip: box invis wid m4chgw ht lg_pinsep*eval((`$1')/2+1) + arcd(last box.n, lg_pinsep/2, 180, 360) + { line to last box.ne chop -linewid bp__/2 } + { line from last arc.start to last box.nw chop -linewid bp__/2 } + line from last box.nw to last box.sw then to last box.se then to last box.ne + `$3']') `A sequence of pins along the east or west side of a chip: - lg_pinseq(initial pin no,final pin no, - e|w,initial offset,pinnum_root,Labelroot,[not])' -lg_pinseq(1,8,w) + lg_pinseq(initial pin no, final pin no, + e|w, initial offset, pinnum_root, Labelroot, [N])' + `e.g., lg_pinseq(1,8,w)' define(`lg_pinseq',`for_($1,$2,1, - `lg_pin( Chip.s`$3'+(0,eval($4+m4x)*lg_pinsep), + `lg_pin( Chip.s`$3'+(0,($4+m4x)*lg_pinsep), $6`'m4x,Pin`'eval($5`'m4x),`$3'`$7',eval($5`'m4x))') ') + define(`ic6116',`[ Chip: box wid_ lg_chipwd ht_ 15*lg_pinsep lg_pin(Chip.sw_+(0,lg_pinsep),GND,Pin12,w,12) lg_pin(Chip.sw_+(0,2*lg_pinsep),lg_bartxt(CS),Pin18,wN,18) @@ -113,4 +113,163 @@ define(`icVS1053',`[ Chip: chip_gen(32) SDCD,RX,TX,7,6,5,4,3,2,1,0,GND,3V3,AGND,MIC-,MIC+) `$1']') + `ArduinoUno( wid,ht,pinlen )' +define(`ArduinoUno',`[ + define(`m4bwid',`ifelse(`$1',,`24*L_unit',`$1')')dnl + define(`m4bht',`ifelse(`$2',,`20*lg_pinsep',`$2')')dnl +# + command "{\small\sf" + Connector: box wid m4bwid ht m4bht +# + plen = ifelse(`$4',,`2*L_unit',`$4') +# +Loopover_(`x',`ifelse(x,nul,, + `Pin`'eval(5+m4Lx): line left_ plen from Connector.nw-(0,(5+m4Lx)*lg_pinsep) + { "x" ljust at last line.start }')', + IOREF, RESET,`$+$`'3V3',`$+$`'5V', GND, GND, VIN, + nul, A0, A1, A2, A3, A4, A5) +# +Loopover_(`x',`ifelse(x,nul,, + `Pin`'eval(22-m4Lx): line right_ plen from Connector.ne-(0,m4Lx*lg_pinsep) + { "x" rjust at last line.start }')', + SCL, SDA, AREF, GND, D13, D12, \char126 D11, \char126 D10, \char126 D9, D8, + nul, D7, \char126 D6, \char126 D5, D4, \char126 D3, D2, TX D1, RX D0) +# + command "}" + `$4'] ') + + `ArduinoLeonardo( wid,ht,pinlen )' +define(`ArduinoLeonardo',`[ + define(`m4bwid',`ifelse(`$1',,`24*L_unit',`$1')')dnl + define(`m4bht',`ifelse(`$2',,`20*lg_pinsep',`$2')')dnl +# + command "{\small\sf" + Connector: box wid m4bwid ht m4bht +# + plen = ifelse(`$4',,`2*L_unit',`$4') +# +Loopover_(`x',`ifelse(x,nul,, + `Pin`'eval(5+m4Lx): line left_ plen from Connector.nw-(0,(5+m4Lx)*lg_pinsep) + { "x" ljust at last line.start }')', + IOREF, RESET,`$+$`'3V3',`$+$`'5V', GND, GND, VIN, + nul, A0, A1, A2, A3, A4, A5) +# +Loopover_(`x',`ifelse(x,nul,, + `Pin`'eval(22-m4Lx): line right_ plen from Connector.ne-(0,m4Lx*lg_pinsep) + { "x" rjust at last line.start }')', + SCL, SDA, AREF, GND, + \char126 D13, D12, \char126 D11, \char126 D10, \char126 D9, D8, + nul, D7, \char126 D6, \char126 D5, D4, \char126 D3, D2, TX D1, RX D0) +# + command "}" + `$4'] ') + + `RPi( wid,ht,pinlen )' +define(`RPi',`[ + define(`m4bwid',`ifelse(`$1',,`34*L_unit',`$1')')dnl + define(`m4bht',`ifelse(`$2',,`21*lg_pinsep',`$2')')dnl +# + command "{\small\sf" + GPIO: box wid m4bwid ht m4bht + plen = ifelse(`$4',,`6*L_unit',`$4') +# +define A_LeftGPIO { + exec sprintf("Pin%g: line left_ plen from GPIO.nw-(0,%g)",\ + 2*(`$'1)-1,(`$'1)*lg_pinsep) + { "`$'3" ljust at last line.start } + "`$'2" at last line.c above } +# +Loopover_(`x',`ifelse(x,nul,,`A_LeftGPIO(m4Lx,patsubst(x,;,`,'))')', + ;3V3, + 2;SDA1, 3;SCL1, 4;GPIO\_GCLK, + ;GND, + 17;GPIO\_GEN0, 27;GPIO\_GEN2, 22;GPIO\_GEN3, + ;3V3, + 10;SPI\_MOSI, 9;SPI\_MISO, 11;SPI\_SCLK, + ;GND, + ;ID\_SD, + 5;, 6;, 13;, 19;, 26;, + ;GND ) +# +define A_RightGPIO { + exec sprintf("Pin%g: line right_ plen from GPIO.ne-(0,%g)",\ + 2*(`$'1),(`$'1)*lg_pinsep) + { "`$'3" rjust at last line.start } + "`$'2" at last line.c above } +# +Loopover_(`x',`ifelse(x,nul,,`A_RightGPIO(m4Lx,patsubst(x,;,`,'))')', + ;5V, + ;5V, + ;GND, + 14;TXD0, 15;RXD0, 18;GPIO\_GEN1, + ;GND, + 23;GPIO\_GEN4, 24;GPIO\_GEN5, + ;GND, + 25;GPIO\_GEN6, 8;SPI\_CEO\_N, 7;SPI\_CE1\_N, + ;ID\_SC, + ;GND, + 12;, + ;GND, + 16;, 20;, 21; ) +# + command "}" + `$4'] ') + + `USB_C_Socket( wid, ht, pinlen )' +define(`USB_C_Socket',`[ + define(`m4bwid',`ifelse(`$1',,`18*L_unit',`$1')')dnl + define(`m4bht',`ifelse(`$2',,`14*lg_pinsep',`$2')')dnl + command "{\small\sf" +# + Base: box wid m4bwid ht m4bht rad 5/3*lg_pinsep + plen = ifelse(`$4',,`6*L_unit',`$4') +# + Loopover_(`x', + `B`'eval(13-m4Lx): dnl + line left_ plen from Base.n-(m4bwid/2,(m4Lx+0.5)*lg_pinsep) + {"x" ljust at last line.start}', + GND, RX1$+$, RX1$-$, VBUS, SBU2, D$-$, D$+$, CC2, VBUS, TX2$-$, TX2$+$, GND) +# + Loopover_(`x', + `A`'m4Lx: line right_ plen from Base.n+(m4bwid/2,-(m4Lx+0.5)*lg_pinsep) + {"x" rjust at last line.start}', + GND, TX1$+$, TX1$-$, VBUS, CC1, D$+$, D$-$, SBU1, VBUS, RX2$-$, RX2$+$, GND) +# + command "}" + `$4']') + + `HDMI_micro( wid, ht, pinlen )' +define(`HDMI_micro',`[ + define(`m4bwid',`ifelse(`$1',,`16*L_unit',`$1')')dnl + define(`m4bht',`ifelse(`$2',,`20*lg_pinsep+m4bwid*2/3',`$2')')dnl + command "{\small\sf" +# + Base:[line up m4bht/2 then right m4bwid*2/3 \ + then right m4bwid/3 down m4bwid/3 \ + then down m4bht-2*m4bwid/3 then down m4bwid/3 left m4bwid/3 \ + then left m4bwid*2/3 then to Here] + plen = ifelse(`$4',,`6*L_unit',`$4') +# + Loopover_(`x', + `Pin`'m4Lx: line left_ plen from Base.nw-(0,m4bwid/3+m4Lx*lg_pinsep) + {"x" ljust at last line.start} + "m4Lx" at last line.c above', + HPD, UTILITY, D2$+$, D2\_SH, D2$-$, D1$+$, D1\_SH, D1$-$, D0$+$, D0\_SH, + D0$-$, CLK$+$, CLK\_SH, CLK$-$, CEC, GND, SCL, SDA, $+``$''5V) + line from Base.nw+(m4bwid*2/3-lg_pinsep,0) up plen + r_text(21) at last line.c+(-5bp__,0) + r_text(SH2) at last line.start + (0,-10bp__) + line from Base.nw+(m4bwid*2/3-2*lg_pinsep,0) up plen + r_text(20) at last line.c+(-5bp__,0) + r_text(SH1) at last line.start + (0,-10bp__) + line from Base.sw+(m4bwid*2/3-lg_pinsep,0) down plen + r_text(23) at last line.c+(-5bp__,0) + r_text(SH4) at last line.start + (0, 10bp__) + line from Base.sw+(m4bwid*2/3-2*lg_pinsep,0) down plen + r_text(22) at last line.c+(-5bp__,0) + r_text(SH3) at last line.start + (0, 10bp__) +# + command "}" + `$4']') + divert(0)dnl -- cgit v1.2.3